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Alteration of surface of silicon solar cell with chemical etchant prior to application of antireflection (AR) coating and encapsulant FEP Teflon, reduces surface reflectivity to 2%. Reduced reflection achieved occurs at all wavelengths resulting in improved short circuit current and spectral response. Improved collection efficiency is also expected.
Open-circuit voltages as high as 0.645 V (AM0, 25 C) have been obtained by a new process developed for low-resistivity silicon. The process utilizes high-dose phosphorus implantation followed by furnace annealing and simultaneous oxide growth. The effect of the thermally grown oxide is a reduction of surface recombination velocity; the oxide also acts as a moderately efficient antireflection (AR) coating. Boron-doped, float-zone silicon with resistivities from 0.1 to 1.0 (omega)(cm) has been processed according to this sequence; results show that the highest open-circuit voltage is obtained with 0.1(omega)(cm) starting material. The effects of Auger recombination and bandgap narrowing caused by high doping concentrations in the n(+)junction region have been investigated by implanting phosphorus over a wide range of dose levels. The effects of emitter-phosphorus concentrations tailored to optimize electric fields in the emitter have also been investigated.
High-efficiency dendritic cells were discussed. The influence of twin planes and heat treatment on the location and effect of trace impurities was of particular interest. Proper heat treatment often increases efficiency by causing impurities to pile up at twin planes. Oxide passivation had a beneficial effect on efficiency. A very efficient antireflective (AR) coating of zinc selenide and magnesium fluoride was designed and fabricated. An aluminum back-surface reflector was also effective.
Clamping device applies protective or antireflective dielectric coating to lenses or other optical elements. Alternative version of device applies thin sheet of dielectric film to ring or stretches it for clamping in holder to form pellicle or beam splitter. Defects avoided by new apparatus, which uniformly stretches dielectric films in radial direction and creates vacuum between them before thermally bonded to optical element.
Computer-controlled ink-jet-assisted metallization of the front surface of solar cells with metalorganic silver inks offers a maskless alternative method to conventional photolithography and screen printing. This method can provide low cost, fine resolution, reduced process complexity, avoidance of degradation of the p-n junction by firing at lower temperature, and uniform line film on rough surface of solar cells. The metallization process involves belt furnace firing and thermal spiking. With multilayer ink jet printing and firing, solar cells of about 5-6 percent efficiency without antireflection (AR) coating can be produced. With a titanium thin-film underlayer as an adhesion promoter, solar cells of average efficiency 8.08 percent without AR coating can be obtained. This efficiency value is approximately equal to that of thin-film solar cells of the same lot. Problems with regard to lower inorganic content of the inks and contact resistance are noted.
Large area GaAs/Ge cells offer substantial promise for increasing the power output from existing silicon solar array designs and for providing an enabled technology for missions hitherto impossible using silicon. Single junction GaAs/Ge cells offer substantial advantages in both size, weight, and cost compared to GaAs cells but the efficiency is limited to approximately 19.2 to 20 percent AMO. The thermal absorptance of GaAs/Ge cells is also worse than GaAs/GaAs cells (0.88 vs 0.81 typ.) due to the absorption in the Ge substrate. On the other hand dual junction GaAs/Ge cells offer efficiencies up to ultimately 24 percent AMO in sizes up to 8 x 8 cm but there are still technological issues remaining to achieve current matching in the GaAs and Ge cells. This can be achieved through tuned antireflection (AR) coatings, improved quality of the GaAs growth, improved quality Ge wafers and the use of a Back Surface Field (BSF)/Back Surface Reflector (BSR) in the Ge cell. Although the temperature coefficients of efficiency and voltage are higher for dual junction GaAs/Ge cells, it has been shown elsewhere that for typical 28 C cell efficiencies of 22 percent (dual junction) vs 18.5 percent (single junction) there is a positive power tradeoff up to temperatures as high as 120 C. Due to the potential ease of fabrication of GaAs/Ge dual junction cells there is likely to be only a small cost differential compared to single junction cells.
Some p/n graded-bandgap Al(x)Ga(1-x)As solar cells were fabricated and show AMO conversion efficiencies in excess of 15 percent without antireflection (AR) coatings. The emitters of these cells are graded between 0.008 is less than or equal to x is less than or equal to 0.02 during growth of 0.25 to 0.30 micron thick layers. The keys to achieving this performance were careful selection of organometallic sources and scrubbing oxygen and water vapor from the AsH3 source. Source selection and growth were optimized using time-resolved photoluminescence. Preliminary radiation-resistance measurements show AlGaAs cells degraded less than GaAs cells at high 1 MeV electron fluences, and AlGaAs cells grown on GaAs and Ge substrates degrade comparably.
We describe recent technology developments aimed at large CCD imagers for space based applications in the visible and UV. Some of the principal areas of effort include work on reducing device degradation in the natural space-radiation environment, improvements in quantum efficiency in the visible and UV, and larger-device formats. One of the most serious hazards for space based CCD's operating at low signal levels is the displacement damage resulting from bombardment by energetic protons. Such damage degrades charge-transfer efficiency and increases dark current. We have achieved improved hardness to proton-induced displacement damage by selective ion implants into the CCD channel and by reduced temperature of operation. To attain high quantum efficiency across the visible and UV we have developed a technology for back-illuminated CCD's. With suitable antireflection (AR) coatings such devices have quantum efficiencies near 90 percent in the 500-700-nm band. In the UV band from 200 to 400 nm, where it is difficult to find coatings that are sufficiently transparent and can provide good matching to the high refractive index of silicon, we have been able to substantially increase the quantum efficiency using a thin film of HfO2 as an AR coating. These technology efforts were applied to a 420 x 420-pixel frame-transfer imager, and future work will be extended to a 1024 x 1024-pixel device now under development.
Recently, we have succeeded in fabricating diffused junction p(sup +)n(Cd,S) InP solar cells with measured AMO, 25 C open circuit voltage (V(sub OC)) of 887.6 mV, which, to the best of our knowledge, is higher than previously reported V(sub OC) values for any InP homojunction solar cells. The experiment-based projected achievable efficiency of these cells using LEC grown substrates is 21.3 percent. The maximum AMO, 25 C internal losses due to date on bare cells is, however, only 13.2 percent. This is because of large external and internal losses due to non-optimized front grid design, antireflection (AR) coating and emitter thickness. This paper summarizes recent advances in the technology of fabrication of p(sup +)n InP diffused structures and solar cells, resulted from a study undertaken in an effort to increase the cell efficiency. The topics discussed in this paper include advances in: (1) the formation on thin p(sup +) InP:Cd emitter layers, (2) electroplated front contacts, (3) surface passivation and (4) the design of a new native oxide/Al2O3/MgF2 tree layer AR coating using a chemically-grown P-rich passivating oxide as a first layer. Based on the high radiation resistance and the excellent post-irradiation annealing and recovery demonstrated in the early tests done to date, as well as the projected high efficiency and low-cost high-volume fabricability, these cells show a very good potential for space photovoltaic applications.
Recently, we have succeeded in fabricating diffused junction p(+)n(Cd,S) InP solar cells with measured AMO, 25 C open circuit voltage (V(sub OC)) of 887.6 mV, which, to the best of our knowledge, is higher than previously reported V(sub OC) values for any InP homojunction solar cells. The experiment-based projected achievable efficiency of these cells using LEC grown substrates is 21.3%. The maximum AMO, 25 C efficiency recorded to date on bare cells is, however, only 13.2%. This is because of large external and internal losses due to non-optimized front grid design, antireflection (AR) coating and emitter thickness. This paper summarizes recent advances in the technology of fabrication of p(+)n InP diffused structures and solar cells, resulted from a study undertaken in an effort to increase the cell efficiency. The topics discussed in this paper include advances in: 1) the formation of thin p(+) InP:Cd emitter layers, 2) electroplated front contacts, 3) surface passivation and 4) the design of a new native oxide/AI203/MgF2 three layer AR coating using a chemically-grown P-rich passivating oxide as a first layer. Based on the high radiation resistance and the excellent post-irradiation annealing and recovery demonstrated in the early tests done to date, as well as the projected high efficiency and low-cost high-volume fabricability, these cells show a very good potential for space photovoltaic applications.
The present ground based investigations give the first definitive look describing the expected on-orbit charging behavior of Orion UltraFlex array coupons in the Low Earth Orbital and Geosynchronous Environments. Furthermore, it is important to note that the LEO charging environment also applies to the International Space Station as well as to the lunar mission charging environments. The GEO charging environment includes the bounding case for all lunar orbital and lunar surface mission environments. The UltraFlex thin film photovoltaic array technology has been targeted to become the sole power system for life support and on-orbit power for the manned Aires Crew Exploration Vehicle. It is therefore, crucial to gain an understanding of the complex charging behavior to answer some of the basic performance and survivability issues in an attempt to ascertain that a single UltraFlex array design will be able to cope with the projected worst case LEO and GEO charging environments. Testing was limited to four array coupons, two coupons each from two different array manufactures, Emcore and Spectrolab. The layout of each array design is identical and varies only in the actual cell technology used. The individual array cells from each manufacturer have an antireflection layered coating and come in two different varieties either uncoated (only AR coating) or coated with a thin conducting ITO layer. The LEO Plasma tests revealed that all four coupons passed the arc threshold -120 V bias tests. GEO electron gun charging tests revealed that only front side area of ITO coated coupons passed tests. Only the Emcore AR array passed backside Stage 2 GEO Tests.
Solar array design for any spacecraft is determined by the orbit parameters. For example, operational voltage for spacecraft in Low Earth Orbit (LEO) is limited by significant differential charging due to interactions with low temperature plasma. In order to avoid arcing in LEO, solar array is designed to generate electrical power at comparatively low voltages (below 100 V) or to operate at higher voltages with encapsulated of all suspected discharge locations. In Geosynchronous Orbit (GEO) differential charging is caused by energetic electrons that produce differential potential between coverglass and conductive spacecraft body in a kilovolt range. In such a case, weakly conductive layer over coverglass (ITO) is one of possible measures to eliminate dangerous discharges on array surface. Temperature variations for solar arrays in both orbits are measured and documented within the range of -150 C +110 C. This wide interval of operational temperatures is regularly reproduced in ground tests with radiative heating and cooling inside shroud with flowing liquid nitrogen. The requirements to solar array design and tests turn out to be more complicated when planned trajectory crosses these two orbits and goes closer to Sun. Conductive layer over coverglass causes sharp increase in parasitic current collected from LEO plasma, high temperature may cause cracks in encapsulating material (RTV), radiative heating of coupon in vacuum chamber becomes practically impossible above 150 C, conductivities of glass and adhesive go up with temperature that decrease array efficiency, and mechanical stresses grow up to critical magnitudes. A few test arrangements and respective results are presented in current paper. Coupons were tested against arcing in simulated LEO and GEO environments under elevated temperatures up to 200 C. The dependence of leakage current on temperature was measured, and electrostatic cleanness was verified for coupons with antireflection (AR) coating over ITO layer.
Solar array design for any spacecraft is determined by the orbit parameters. For example, operational voltage for spacecraft in Low Earth Orbit (LEO) is limited by significant differential charging due to interactions with low temperature plasma. In order to avoid arcing in LEO, solar array is designed to generate electrical power at comparatively low voltages (below 100 volts) or to operate at higher voltages with encapsulation of all suspected discharge locations. In Geosynchronous Orbit (GEO) differential charging is caused by energetic electrons that produce differential potential between the coverglass and the conductive spacecraft body in a kilovolt range. In such a case, the weakly conductive layer over coverglass, indium tin oxide (ITO) is one of the possible measures to eliminate dangerous discharges on array surface. Temperature variations for solar arrays in both orbits are measured and documented within the range of minus150 degrees Centigrade to plus 1100 degrees Centigrade. This wide interval of operational temperatures is regularly reproduced in ground tests with radiative heating and cooling inside a shroud with flowing liquid nitrogen. The requirements to solar array design and tests turn out to be more complicated when planned trajectory crosses these two orbits and goes closer to the Sun. The conductive layer over coverglass causes a sharp increase in parasitic current collected from LEO plasma, high temperature may cause cracks in encapsulating (Room Temperature Vulcanizing (RTV) material; radiative heating of a coupon in vacuum chamber becomes practically impossible above 1500 degrees Centigrade; conductivities of glass and adhesive go up with temperature that decrease array efficiency; and mechanical stresses grow up to critical magnitudes. A few test arrangements and respective results are presented in current paper. Coupons were tested against arcing in simulated LEO and GEO environments under elevated temperatures up to 2000 degrees Centigrade. The dependence of leakage current on temperature was measured, and electrostatic cleanness was verified for coupons with antireflection (AR) coating over the indium tin oxide (ITO) layer.
Using a variety of non-vacuum deposition techniques coatings were implemented on silicon solar cells and arrays of cells interconnected on Kapton substrates. The coatings provide both antireflection optical matching and environmental protection. Reflectance minima near 2% was achieved at a single wavelength in the visible. Reflectance averaging below 5% across the useful collection range was demonstrated. The coatings and methods of deposition were: (1) Ta2O5 spun, dipped or sprayed; (2) Ta2O5.SiO2 spun, dipped or sprayed; (3) GR908 (SiO2) spun, dipped, or sprayed. Total coating thickness were in the range of 18 microns to 25 microns. The coatings and processes are compatible with single cells or cells mounted on Kapton substrates.
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Instrument for measuring light falling on given spot uses simple silicon photovoltaic cell as sensing element. It measures all light at location: direct, scattered, reflected, or reradiated. Silicon cell is coated with thick antireflecting layer of silicon monoxide and is enclosed in glass dome. Large heat sink reduces temperature fluctuations. Instrument is accurate within few percentage points over angle of Sun's arc across sky.
Design work for a photovoltaic module, fabricated using single crystal silicon dendritic web sheet material, resulted in the identification of surface treatment to the module glass superstrate which improved module efficiencies. A final solar module environmental test, a simulated hailstone impact test, was conducted on full size module superstrates to verify that the module's tempered glass superstrate can withstand specified hailstone impacts near the corners and edges of the module. Process sequence design work on the metallization process selective, liquid dopant investigation, dry processing, and antireflective/photoresist application technique tasks, and optimum thickness for Ti/Pd are discussed. A noncontact cleaning method for raw web cleaning was identified and antireflective and photoresist coatings for the dendritic webs were selected. The design of a cell string conveyor, an interconnect feed system, rolling ultrasonic spot bonding heat, and the identification of the optimal commercially available programmable control system are also discussed. An economic analysis to assess cost goals of the process sequence is also given.
The addition of 2-ethyl-1-hexanol to an organometallic titanium compound dissolved in a diluent and optionally containing a lower aliphatic alcohol spreading modifier, produces a solution that can be sprayed onto a substrate and cured to form an antireflection titanium oxide coating having a refractive index of from about 2.0 to 2.2.