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Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

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At least 181 records · Page 10
All sourcesNASA NTRSDOE OSTI
NASA NTRS1999

The Oxidation Rate of SiC in High Pressure Water Vapor Environments

CVD SiC and sintered alpha-SiC samples were exposed at 1316 C in a high pressure burner rig at total pressures of 5.7, 15, and 25 atm for times up to 100h. Variations in sample emittance for the first nine hours of exposure were used to determine the thickness of the silica scale as a function of time. After accounting for volatility of silica in water vapor, the parabolic rate constants for Sic in water vapor pressures of 0.7, 1.8 and 3.1 atm were determined. The dependence of the parabolic rate constant on the water vapor pressure yielded a power law exponent of one. Silica growth on Sic is therefore limited by transport of molecular water vapor through the silica scale.

Opila, Elizabeth J.↗
NASA NTRS2002

SSG SiC Optical Systems in Space

Silicon Carbide (SiC) materials provide a number of benefits for space based optical systems. SSG Precision Optronics has extensive experience in the areas of design, fabrication, integration, and test of SiC optical systems. This expertise has been applied to produce a number of SiC-based instruments, including the Miniature Infrared Camera and Spectrometer (MICAS) and Advanced Land Imager (ALI) optical systems which have flown as part of NASA's New Millennium program. Our presentation will provide an overview of SSG's experience in the development of these SiC flight systems.

Robichaud, Joseph↗
NASA NTRS2002

Precursor Selection for Property Optimization in Biomorphic SiC Ceramics

Biomorphic SiC ceramics have been fabricated using different wood precursors. The evolution of volume, density and microstructure of the woods, carbon performs, and final SiC products are systematically studied in order to establish experimental guidelines that allow materials selection. The wood density is a critical characteristic, which results in a particular final SiC density, and the level of anisotropy in mechanical properties in directions parallel (axial) and perpendicular (radial) to the growth of the wood. The purpose of this work is to explore experimental laws that can help choose a type of wood as precursor for a final SiC product, with a given microstructure, density and level of anisotropy. Preliminary studies of physical properties suggest that not only mechanical properties are strongly anisotropic, but also electrical conductivity and gas permeability, which have great technological importance.

Varela-Feria, F. M.↗
NASA NTRS2003

Measured Propagation Characteristics of Coplanar Waveguide on Semi-Insulating 4H-SiC Through 800 K

Wireless sensors for high temperature industrial applications and jet engines require RF transmission lines and RF integrated circuits (RFICs) on wide bandgap semiconductors such as SiC. In this paper, the complex propagation constant of coplanar waveguide fabricated on semiinsulating 4H-SiC has been measured through 813 K. It is shown that the attenuation increases 3.4 dB/cm at 50 GHz as the SiC temperature is increased from 300 K to 813 K. Above 500 K, the major contribution to loss is the decrease in SiC resistivity. The effective permittivity of the same line increases by approximately 5 percent at microwave frequencies and 20 percent at 1 GHz.

Ponchak, George E.↗
NASA NTRS2008

Low-Cost, Large C-SiC Blisk Fabrication

C-SiC composites offer unique properties for propulsion applications. However, fabrication of low-cost, thick, large scale C-SiC disk for integrally bladed disk (blisk) applications has not been established yet. MER has demonstrated a new process to address this issue. Polymer-based processing was employed for interfacial coatings, consolidation and densification. Up to 40" O.C., 2" thick C-SiC composite processing was established, yielding in excess of 1.8 g/cu cm density. Computer tomography (CT) scans on the 40" O.D., 2" thick C-SiC disk showed no visible delamination, and good density uniformity. Stress-rupture testing in air was conducted at 2200 F, 2400 F and 2550 F.

Kowbel, W.↗
NASA NTRS2011

Conformal Thin Film Packaging for SiC Sensor Circuits in Harsh Environments

In this investigation sputtered silicon carbide annealed at 300 C for one hour is used as a conformal thin film package. A RF magnetron sputterer was used to deposit 500 nm silicon carbide films on gold metal structures on alumina wafers. To determine the reliability and resistance to immersion in harsh environments, samples were submerged in gold etchant for 24 hours, in BOE for 24 hours, and in an O2 plasma etch for one hour. The adhesion strength of the thin film was measured by a pull test before and after the chemical immersion, which indicated that the film has an adhesion strength better than 10(exp 8) N/m2; this is similar to the adhesion of the gold layer to the alumina wafer. MIM capacitors are used to determine the dielectric constant, which is dependent on the SiC anneal temperature. Finally, to demonstrate that the SiC, conformal, thin film may be used to package RF circuits and sensors, an LC resonator circuit was fabricated and tested with and without the conformal SiC thin film packaging. The results indicate that the SiC coating adds no appreciable degradation to the circuits RF performance. Index Terms Sputter, silicon carbide, MIM capacitors, LC resonators, gold etchants, BOE, O2 plasma

Scardelletti, Maximilian C.↗
NASA NTRS2010

A Novel Tungsten-Nickel Alloy Ohmic Contact to SiC at 900 C

A novel tungsten-nickel ohmic contact metallization on 4H-SiC and 6H-SiC capable of surviving temperatures as high as 900 C is reported. Preliminary results revealed the following: 1) ohmic contact on n-type 4H-SiC having net doping levels (Nd's) of 1.4 and 2 x 10(exp 19) per cubic centimeter, with specific contact resistances rhosNd's of 7.69 x 10(exp -4) and 5.81 x 10(exp -4) OMEGA (raised dot) square centimeters, respectively, after rapid thermal annealing (RTA), and 5.9 x 10(exp -3) and 2.51 x 10(exp -4) OMEGA (raised dot) square centimeters, respectively, after subsequent soak at 900 C for 1 h in argon, and 2) ohmic contact on n- and p-type 6H-SiC having Nd > 2 x 10(exp 19) and Na > 1 x 10(exp 20) per cubic centimeter, with rhosNd = 5 x 10(exp -5) and rhosNa = 2 X 10(exp -4) OMEGA (raised dot) square centimeter, respectively, after RTA, and rhosNd = 2.5 x 10 (exp -5) and rhosNa = 1.5 x 10(exp -4) OMEGA (raised dot) square centimeter after subsequent treatment at 900 C for 1 h in argon, respectively.

Okojie, Robert S.↗
NASA NTRS2004

AIN-Based Packaging for SiC High-Temperature Electronics

Packaging made primarily of aluminum nitride has been developed to enclose silicon carbide-based integrated circuits (ICs), including circuits containing SiC-based power diodes, that are capable of operation under conditions more severe than can be withstood by silicon-based integrated circuits. A major objective of this development was to enable packaged SiC electronic circuits to operate continuously at temperatures up to 500 C. AlN-packaged SiC electronic circuits have commercial potential for incorporation into high-power electronic equipment and into sensors that must withstand high temperatures and/or high pressures in diverse applications that include exploration in outer space, well logging, and monitoring of nuclear power systems. This packaging embodies concepts drawn from flip-chip packaging of silicon-based integrated circuits. One or more SiC-based circuit chips are mounted on an aluminum nitride package substrate or sandwiched between two such substrates. Intimate electrical connections between metal conductors on the chip(s) and the metal conductors on external circuits are made by direct bonding to interconnections on the package substrate(s) and/or by use of holes through the package substrate(s). This approach eliminates the need for wire bonds, which have been the most vulnerable links in conventional electronic circuitry in hostile environments. Moreover, the elimination of wire bonds makes it possible to pack chips more densely than was previously possible.

Savrun, Ender↗
NASA NTRS2011

Hysteresis in the Active Oxidation of SiC

Si and SiC show both passive oxidation behavior where a protective film of SiO2 forms and active oxidation behavior where a volatile suboxide SiO(g) forms. The active-to-passive and passive-to-active oxidation transitions are explored for both Si and SiC. Si shows a dramatic difference between the P(O2) for the two transitions of ~10-4 bar. The active-to-passive transition is controlled by the condition for SiO2/Si equilibrium and the passive-to-active transition is controlled by the decomposition of SiO2. In the case of SiC, the P(O2) for these transitions are much closer. The active-to-passive transition appears to be controlled by the condition for SiO2/SiC equilibrium. The passive-to-active transition appears to be controlled by the interfacial reaction of SiC and SiO2 and subsequent generation of gases at the interface which leads to scale breakdown.

Jacobson, Nathan S.↗
NASA NTRS2011

Development of SiC Large Tapered Crystal Growth

Research Focus Area: Power Electronics, Temperature Tolerant Devices. Demonstrate initial feasibility of totally new "Large Tapered Crystal" (LTC) process for growing vastly improved large-diameter wide-band gap wafers. Addresses Targets: The goal of this research is to experimentally investigate and demonstrate feasibility of the key unproven LTC growth processes in SiC. Laser-assisted growth of long SiC fiber seeds. Radial epitaxial growth enlargement of seeds into large SiC boules. Uniqueness and Impacts open a new technology path to large-diameter SiC and GaN wafers with 1000-fold defect density improvement at 2-4 fold lower cost. Leapfrog improvement in wide band gap power device capability and cost.

Neudeck, Phil↗
NASA NTRS2015

Packaging Technologies for 500 C SiC Electronics and Sensors: Challenges in Material Science and Technology

This paper presents ceramic substrates and thick-film metallization based packaging technologies in development for 500C silicon carbide (SiC) electronics and sensors. Prototype high temperature ceramic chip-level packages and printed circuit boards (PCBs) based on ceramic substrates of aluminum oxide (Al2O3) and aluminum nitride (AlN) have been designed and fabricated. These ceramic substrate-based chip-level packages with gold (Au) thick-film metallization have been electrically characterized at temperatures up to 550C. The 96 alumina packaging system composed of chip-level packages and PCBs has been successfully tested with high temperature SiC discrete transistor devices at 500C for over 10,000 hours. In addition to tests in a laboratory environment, a SiC junction field-effect-transistor (JFET) with a packaging system composed of a 96 alumina chip-level package and an alumina printed circuit board was tested on low earth orbit for eighteen months via a NASA International Space Station experiment. In addition to packaging systems for electronics, a spark-plug type sensor package based on this high temperature interconnection system for high temperature SiC capacitive pressure sensors was also developed and tested. In order to further significantly improve the performance of packaging system for higher packaging density, higher operation frequency, power rating, and even higher temperatures, some fundamental material challenges must be addressed. This presentation will discuss previous development and some of the challenges in material science (technology) to improve high temperature dielectrics for packaging applications.

dielectric properties↗
NASA NTRS2017

Taking SiC Power Devices to the Final Frontier: Addressing Challenges of the Space Radiation Environment

Silicon carbide power device technology has the potential to enable a new generation of aerospace power systems that demand high efficiency, rapid switching, and reduced mass and volume in order to expand space-based capabilities. For this potential to be realized, SiC devices must be capable of withstanding the harsh space radiation environment. Commercial SiC components exhibit high tolerance to total ionizing dose but to date, have not performed well under exposure to heavy ion radiation representative of the on-orbit galactic cosmic rays. Insertion of SiC power device technology into space applications to achieve breakthrough performance gains will require intentional development of components hardened to the effects of these highly-energetic heavy ions. This work presents heavy-ion test data obtained by the authors over the past several years for discrete SiC power MOSFETs, JFETs, and diodes in order to increase the body of knowledge and understanding that will facilitate hardening of this technology to space radiation effects. Specifically, heavy-ion irradiation data taken under different bias, temperature, and ion beam conditions is presented for devices from different manufacturers, and the emerging patterns discussed.

Power semiconductor devices↗
NASA NTRS2017

Pt: Ti Diffusion Barrier, Interconnect, and Simultaneous Ohmic Contacts to n- and p-type 4H-SiC

We report the initial results of using co-sputtered Pt:Ti 80:20 at. % composition ratio metallization as a diffusion barrier against gold (Au) and oxygen (O), as an interconnect layer, as well as forming simultaneous ohmic contacts to n-and p-type 4H-SiC. Having a single conductor with such combined multi-functional attributes would appreciably reduce the fabrication costs, processing time and complexity that are inherent in the production of SiC based devices. Auger Electron Spectroscopy, Focused Ion Beam-assisted Field Emission Scanning Electron Microscopy and Energy Dispersive Spectroscopy analyses revealed no Au and O migration to the SiC contact surface and minimal diffusion through the Pt:Ti barrier layer after 15 minutes of exposure at 800 °C in atmosphere, thus offering potential long term stability of the ohmic contacts. Specific contact resistance values of 7 x 10(exp -5) and 7.4 x 10(exp -4) Ω-sq.cm were obtained on the n (N(sub d)=7 x 10(exp 18) per cu.cm and p (N(sub a)=2 x 10(exp 20) per cu. cm) -type 4H-SiC, respectively. The resistivity of 75 μΩ-cm was obtained for the Pt:Ti layer that was sandwiched between two SiO2 layers and annealed in pure O ambient up to 900 °C, which offers promise as a high temperature interconnect metallization.

Simultaneous Ohmic Contact↗
NASA NTRS2022

Simulation-based Study of Single-Event Burnout in 4H-SiC High-Voltage Vertical Superjunction DMOSFET: Physical Failure Mechanism and Robustness vs. Performance Tradeoffs

We explore and elucidate physical failure mechanisms in a 4H-SiC, high voltage, superjunction (SJ) vertical DMOSFET from a single heavy ion strike using three-dimensional electro-thermal transient simulations. The single-event burnout (SEB) failure is thermal runaway from second breakdown, initiated by impact ionization and terminated with mesoplasma formation, at the center of the P-pillar/N+ substrate interface. We also demonstrate that the SEB performance of this SiC SJ DMOSFET is insensitive to the pillar width but sensitive to the strike location with ion strike at the P-pillar causing SEB at a lower blocking voltage than at the N-pillar. Compared to commercially available 1.2 kV blocking-rated non-SJ DMOSFETs, which have been demonstrated to survive SEB up to 525 V, the SJ DMOSFET increases SEB survival threshold voltage (VSEB) by a factor of 2.2, making it close to 1200 V, while the on-resistance is increased by only 11%. Using our recently developed figure of merit (FoM), which considers the trade-off between VSEB and on-state performance, we find that the SiC SJ DMOSFET achieves a FoM that is 14 times better, making it superior to conventional 1.2 kV SiC DMOSFETs for long-term radiation-tolerant operation in space applications.

Silicon Carbide↗
NASA NTRSDate not supplied

Progress Towards SiC ASICs for Extreme Temperature and Radiation Environments

This presentation describes development and demonstrations of semiconductor integrated circuits (ICs) and ceramic packaging that are arguably the most environmentally durable transistor electronics ever demonstrated. Silicon carbide (SiC) junction field effect transistor-resistor (JFET-R) ICs fabricated by NASA Glenn Research Center with two-level interconnect have successfully operated for over 1 year in 500 °C air-ambient, 60 days in 460 °C and 9.3 MPa pressure caustic Venus surface environment test chamber, and radiation exposure through 7 Mrad(Si) total ionizing dose (TID) and 86 MeV-cm2/mg heavy ion strikes. Furthermore, these ICs have also demonstrated operation from -190 °C to +812 °C (over 1000 °C temperature span) without significant change in signal (input /output) or power supply voltages. While the operating frequency and functional complexity is far below silicon-based ICs, these SiC application specific ICs (ASICs) are nevertheless becoming capable of providing unique and advantageous harsh-environment circuit functionality without cooling/sheltering overhead. With modest adjustments, the SiC JFET-R fabrication process is compatible with semiconductor mass-production tools and materials. As an initial step towards manufacture, a majority of processing steps to realize the next SiC JFET-R IC prototype wafer run have been outsourced to commercial foundry. It is expected that further upscaling combined with technology transfer to commercial production will lower investment and risk barriers to useful application deployment.

high temperature↗
DOE OSTI2025

Machine learning-enabled multiscale modeling of mechanical deformation of aluminum and Al-SiC nanocomposites

A machine learning-enabled multiscale framework is developed for modeling the mechanical response of both pure metal and nanoparticle-reinforced metal matrix nanocomposites (MMNCs). Using aluminum–silicon carbide (Al-SiC) as an example MMNC, atomistic simulations reveal three distinct deformation mechanisms (i.e., defect-free, dislocation-based, and interface separation) governed by the interfaces between the Al matrix and SiC nanoparticles. As compared with single crystal Al, the lattice undergoes a more abrupt failure once the dislocation network becomes extensive and void nucleation initiates, whereas in Al-SiC, nanoparticle interfaces enable a more gradual progression of damage. These mechanisms are captured through a combined classification-regression neural network surrogate model that bridges atomic-scale insights with continuum-scale finite element analysis. Machine learning-enabled multiscale modeling of pure Al accurately predicted strain localization and confirmed by in-situ scanning electron microscopic tensile testing on perforated Al specimens. This study underscores the promise of integrating physics-informed machine learning with hierarchical modeling to capture the interface dominated phenomena and guide the design of advanced MMNCs.

Al-SiC↗
DOE OSTI2025

A Stable and Ultrafast Control for Multiparallel Grid-Tied SiC Inverters With LVRT Capability Considering Cable Impedance

The stability of multiparalleled grid-tied inverters remains a challenging issue especially during low-voltage ride-through (LVRT) in the presence of grid impedance. SiC device-based grid-tied inverters can achieve advantages such as higher efficiency, reduced size of interface filters, and fast dynamics; however, they can exacerbate this stability issue particularly when LVRT occurs along with high inrush current due to their low inertia characteristics. In this article, a direct deadbeat control method without any PI control loop is proposed for multiparallel grid-tied SiC inverters. The proposed control achieves instantaneous current regulations within switching cycles. In addition, it mitigates high inrush currents and maintains stability during LVRT transients without requiring mode transitions between normal and LVRT operation modes, thereby achieving an ultrafast response and seamless operation through this unified control method. The Lyapunov method is applied to analyze the multiparallel inverter stability in the presence of grid impedance with proposed deadbeat control method. The inverter V-I trajectories during LVRT transients are derived to illustrate the ultrafast and stable feature of proposed control. Finally, the experimental results of two grid-tied SiC inverters operating at LVRT transients are provided to verify the advantages of the proposed control method.

14 SOLAR ENERGY↗
DOE OSTI2025

Preliminary hyperspectral neutron radiography of binder jet 3D printed and melt infiltrated Si–SiC

The preliminary results of hyperspectral neutron radiography of Si–SiC made with binder jet additive manufacturing, subsequent carbon addition, and silicon melt infiltration are presented. The samples were measured in the processing states before and after the melt infiltration to determine if neutrons would help characterize the microstructure to better understand the melt infiltration process. Theoretical Bragg edges were calculated for comparison with the radiographic results. The changes in the Bragg edges from pre- to post-infiltrated reaction-bonded SiC were evident, that could be used to address the differences in microstructures. In conclusion, the preliminary results presented in this study demonstrated that neutron Bragg-edge imaging is possible with Si–SiC reaction-bonded ceramics and can help determine the microstructure of melt infiltrated samples.

SiC↗