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At least 181 records · Page 10

All sources NASA NTRS DOE OSTI

NASA NTRS1991

Ferroelectric Memory Capacitors For Neural Networks

Thin-film ferroelectric capacitors proposed as nonvolatile analog memory devices. Intended primarily for use as synaptic connections in electronic neural networks. Connection strengths (synaptic weights) stored as nonlinear remanent polarizations of ferroelectric films. Ferroelectric memory and interrogation capacitors combined into memory devices in vertical or lateral configurations. Photoconductive layer modulated by light provides variable resistance to alter bias signal applied to memory capacitor. Features include nondestructive readout, simplicity, and resistance to ionizing radiation. Interrogated without destroying stored analog data. Also amenable to very-large-scale integration. Allows use of ac coupling, eliminating errors caused by dc offsets in amplifier circuits of neural networks.

Thakoor, Sarita↗

NASA NTRS1986

Fast Initialization of Bubble-Memory Systems

Improved scheme several orders of magnitude faster than normal initialization scheme. State-of-the-art commercial bubble-memory device used. Hardware interface designed connects controlling microprocessor to bubblememory circuitry. System software written to exercise various functions of bubble-memory system in comparison made between normal and fast techniques. Future implementations of approach utilize E2PROM (electrically-erasable programable read-only memory) to provide greater system flexibility. Fastinitialization technique applicable to all bubble-memory devices.

Looney, K. T.↗

DOE OSTI2021

Two-terminal electronic charge resistance switching device

A two-terminal memory device and methods for its use are provided. In the device, a bottom electrode is electrically continuous with a first operating terminal, and a control gate electrode is electrically continuous with a second operating terminal. A stack of insulator layers comprising a hopping conduction layer and a tunnel layer is contactingly interposed between the bottom electrode and the control gate electrode. The tunnel layer is thinner than the hopping conduction layer, and it has a wider bandgap than the hopping conduction layer. The hopping conduction layer consists of a material that supports electron hopping transport.

Marinella, Matthew↗

DOE OSTI2018

Ionic Tuning of Cobaltites at the Nanoscale

Control of materials through custom design of ionic distributions is one of the most promising approaches for developing future technologies ranging from spintronic logic and memory devices to energy storage. Perovskites have shown particular promise for ionic-devices due to their high ion mobility and sensitivity to chemical stoichiometry. In this work, we demonstrate control of ion distributions in (La,Sr)CoO3. Commensurate with control of the oxygen stoichiometry, the Co valence and saturation magnetization show a smooth continuous variation. In contrast, magnetoresistance measurements show a sharp, step-wise transition in the magnetic anisotropy and resistivity over the same range of oxygen stoichiometry. These results suggest significant phase separation, with conductive magnetic regions and oxygen-deficient, insulating, non-magnetic regions, forming percolated networks. Indeed, X-ray diffraction identifies oxygen vacancy ordering, including the emergence of Brownmillerite ordering. The unusual appearance of the Brownmillerite phase under ambient temperature is further confirmed by high resolution scanning transmission electron microscopy. This work demonstrates room-temperature ionic control of magnetism, electrical conductivity and crystalline structure, in a 40 nm film, presenting new opportunities for ionic devices that leverage multiple material properties.

thin films, magnetism, xmcd, pnr, STEM, defects↗

NASA NTRS2012

Development of Next Generation Memory Test Experiment for Deployment on a Small Satellite

The original Memory Test Experiment successfully flew on the FASTSAT satellite launched in November 2010. It contained a single Ramtron 512K ferroelectric memory. The memory device went through many thousands of read/write cycles and recorded any errors that were encountered. The original mission length was schedule to last 6 months but was extended to 18 months. New opportunities exist to launch a similar satellite and considerations for a new memory test experiment should be examined. The original experiment had to be designed and integrated in less than two months, so the experiment was a simple design using readily available parts. The follow-on experiment needs to be more sophisticated and encompass more technologies. This paper lays out the considerations for the design and development of this follow-on flight memory experiment. It also details the results from the original Memory Test Experiment that flew on board FASTSAT. Some of the design considerations for the new experiment include the number and type of memory devices to be used, the kinds of tests that will be performed, other data needed to analyze the results, and best use of limited resources on a small satellite. The memory technologies that are considered are FRAM, FLASH, SONOS, Resistive Memory, Phase Change Memory, Nano-wire Memory, Magneto-resistive Memory, Standard DRAM, and Standard SRAM. The kinds of tests that could be performed are read/write operations, non-volatile memory retention, write cycle endurance, power measurements, and testing Error Detection and Correction schemes. Other data that may help analyze the results are GPS location of recorded errors, time stamp of all data recorded, radiation measurements, temperature, and other activities being perform by the satellite. The resources of power, volume, mass, temperature, processing power, and telemetry bandwidth are extremely limited on a small satellite. Design considerations must be made to allow the experiment to not interfere with the satellite s primary mission.

MacLeod, Todd↗

DOE OSTI2016

Vacancy structures and melting behavior in rock-salt GeSbTe

Ge-Sb-Te alloys have been widely used in optical/electrical memory storage. Because of the extremely fast crystalline-amorphous transition, they are also expected to play a vital role in next generation nonvolatile microelectronic memory devices. However, the distribution and structural properties of vacancies have been one of the key issues in determining the speed of melting (or amorphization), phase-stability, and heat-dissipation of rock-salt GeSbTe, which is crucial for its technological breakthrough in memory devices. Using spherical aberration-aberration corrected scanning transmission electron microscopy and atomic scale energy-dispersive X-ray mapping, we observe a new rock-salt structure with high-degree vacancy ordering (or layered-like ordering) at an elevated temperature, which is a result of phase transition from the rock-salt phase with randomly distributed vacancies. First-principles calculations reveal that the phase transition is an energetically favored process. Furthermore, molecular dynamics studies suggest that the melting of the cubic rock-salt phases is initiated at the vacancies, which propagate to nearby regions. The observation of multi-rock-salt phases suggests another route for multi-level data storage using GeSbTe.

36 MATERIALS SCIENCE↗

DOE OSTI2018

Sparse Data Acquisition on Emerging Memory Architectures

Emerging memory devices, such as resistive crossbars, have the capacity to store large amounts of data in a single array. Acquiring the data stored in large-capacity crossbars in a sequential fashion can become a bottleneck. We present practical methods, based on sparse sampling, to quickly acquire sparse data stored on emerging memory devices that support the basic summation kernel, reducing the acquisition time from linear to sub-linear. Experimental results show that at least an order of magnitude improvement in acquisition time can be achieved when the data is sparse.

97 MATHEMATICS AND COMPUTING↗

DOE OSTI2025

Autonomous Multistate Nanoencoding Using Combinatorial Ferroelectric Closure Domains in BiFeO 3

Recent advances in ferroic materials have identified topological defects as promising candidates for enabling additional functionalities in future electronic systems. The generation of stable and customizable polar topologies is needed to achieve multistates that enable beyond-binary device architectures. Here, in this study, we show how to autonomously pattern on-demand highly tunable striped closure domains in pristine rhombohedral-phase BiFeO 3 thin films through precise scanning of a biased atomic force microscopy tip along carefully designed paths. By employing this strategy, we generate and manipulate closed-loop structures with high spatial resolution in an automated manner, allowing the creation of highly tunable and intricate topological domain structures that exhibit distinct polarization configurations without the need for electrode deposition or complex heterostructure growth. As a proof-of-concept for ferroelectric beyond-binary memory devices, we use such topological domains as multistates, engineering an alphabet and automating the symbolic writing/reading process using autonomous microscopy. The resulting information density is compared with that of current commercially available memory devices, demonstrating the potential of ferroelectric topological domains for multistate information storage applications.

BiFeO3↗

DOE OSTI2014

Store-operate-coherence-on-value

A system, method and computer program product for performing various store-operate instructions in a parallel computing environment that includes a plurality of processors and at least one cache memory device. A queue in the system receives, from a processor, a store-operate instruction that specifies under which condition a cache coherence operation is to be invoked. A hardware unit in the system runs the received store-operate instruction. The hardware unit evaluates whether a result of the running the received store-operate instruction satisfies the condition. The hardware unit invokes a cache coherence operation on a cache memory address associated with the received store-operate instruction if the result satisfies the condition. Otherwise, the hardware unit does not invoke the cache coherence operation on the cache memory device.

97 MATHEMATICS AND COMPUTING↗

DOE OSTI2017

Implementing the OpenACC Data Model

Programming accelerators today usually requires managing separate virtual and physical memories, such as allocating space in and copying data between host and device memories. The OpenACC API provides data directives and clauses to control this behavior where it is required. This paper describes how the data model is supported in current OpenACC implementations, ranging from research compilers (OpenUH and OpenARC) to a commercial compiler (the PGI OpenACC compiler). This includes implementation of the data directives and clauses, testing whether the data is already present on the device, OpenCL support, managing asynchronous data transfers and memory allocations, handling aliased data, reusing device memory, managing partially present data, and support for shared memory between host and device. Lastly, it also discusses on-going work to manage large, complex dynamic data structures.

Wolfe, Michael↗

DOE OSTI2025

A new era of ferroelectric thin films for nonvolatile memories

Ferroelectric films have potential applications in nonvolatile memory devices. In addition to the well-established perovskite-structure oxide ferroelectrics, hafnia- and wurtzite-based ferroelectrics have recently attracted considerable attention because of the improved scalability of the ferroelectric response (down to nanometer thicknesses), their compatibility with silicon fabrication processes, and the availability of deposition methods that realize three-dimensional structures. Furthermore, due to their high compatibility with silicon processes, these are also expected to be used in emerging energy-efficient applications, such as neuromorphic computing and reservoir computing. In this article, we review the fundamentals of hafnia- and wurtzite-based ferroelectrics and their advantages and issues for developing in nonvolatile memory devices. Then, possible emerging applications are discussed.

36 MATERIALS SCIENCE↗

DOE OSTI2014

Heap/stack guard pages using a wakeup unit

A method and system for providing a memory access check on a processor including the steps of detecting accesses to a memory device including level-1 cache using a wakeup unit. The method includes invalidating level-1 cache ranges corresponding to a guard page, and configuring a plurality of wakeup address compare (WAC) registers to allow access to selected WAC registers. The method selects one of the plurality of WAC registers, and sets up a WAC register related to the guard page. The method configures the wakeup unit to interrupt on access of the selected WAC register. The method detects access of the memory device using the wakeup unit when a guard page is violated. The method generates an interrupt to the core using the wakeup unit, and determines the source of the interrupt. The method detects the activated WAC registers assigned to the violated guard page, and initiates a response.

97 MATHEMATICS AND COMPUTING↗

NASA NTRS1987

Rare-earth substitution in (BiYCa)3(FeSiGe)5O12 bubble films

The substitution of Y by Sm, Tb, Gd, and Ho in (BiYCa)3 FeSiGe)5O12 bubble garnet is shown to have large effects on the growth-induced anisotropy (GIA). The presently accepted film composition intended for 6-or 8-micron-period bubble memory devices demands partial substitution of Y by Gd and Ho. However, comparing films grown under the same growth conditions, it is observed that YGdHoBilG films posess less (GIA) than their Gd, Ho-free counterparts. Thus, to satisfy (GIA) requirements, the supercooling during growth must be increased by 20 K to 80 K with undesirable effects on defect densities. A new film composition containing Sm, Tb, and Gd has been formulated to satisfy all known material property specifications for 6- or 8-micron-period memory devices. It can be grown with only 45-50 K supercooling.

Luther, L. C.↗

DOE OSTI2019

Shape memory embolectomy devices and systems

An embolectomy device comprised of an expansion unit and a support unit is disclosed. The expansion unit can be actuated in response to one or more external stimuli, and the support unit, located proximately to the expansion unit, provides a force to hold the expansion unit in place and to further induce the expansion unit's radial expansion. The radial expansion of the expansion unit causes the expansion unit to physically contact a blood clot, enabling the blood clot to be removed. In some embodiments, the expansion unit can be fabricated from a shape memory polymer foam. In some embodiments the support unit can be fabricated from any elastic material including, without limitation, shape memory alloys.

Szafron, Jason↗

DOE OSTI2022

Shape memory embolectomy devices and systems

59 BASIC BIOLOGICAL SCIENCES↗

DOE OSTI2016

Tailoring Spin Textures in Complex Oxide Micromagnets

Engineered topological spin textures with submicron dimensions in magnetic materials have emerged in recent years as the building blocks for various spin-based memory devices. Examples of these magnetic configurations include magnetic skyrmions, vortices, and domain walls. Here in this paper, we show the ability to control and characterize the evolution of spin textures in complex oxide micromagnets as a function of temperature through the delicate balance of fundamental materials parameters, micromagnet geometries, and epitaxial strain. These results demonstrate that in order to fully describe the observed spin textures, it is necessary to account for the spatial variation of the magnetic parameters within the micromagnet. This study provides the framework to accurately characterize such structures, leading to efficient design of spin-based memory devices based on complex oxide thin films.

36 MATERIALS SCIENCE↗

DOE OSTI2018

Apparatus and methods for memory using in-plane polarization

A memory device includes a semiconductor layer with an in-plane polarization component switchable between a first direction and a second direction. A writing electrode is employed to apply a writing voltage to the semiconductor layer to change the in-plane polarization component between the first direction and the second direction. A reading electrode is employed to apply a reading voltage to the semiconductor layer to measure a tunneling current substantially perpendicular to the polarization direction of the in-plane polarization component. The directions of the reading voltage and the writing voltage are substantially perpendicular to each other. Therefore, the reading process is non-destructive. Thin films (e.g., one unit cell thick) of ferroelectric material can be used in the memory device to increase the miniaturization of the device.

42 ENGINEERING↗

DOE OSTI2018

Intrinsic Two-Dimensional Ferroelectricity with Dipole Locking

Out-of-plane ferroelectricity with a high transition temperature in ultrathin films is important for the exploration of new domain physics and scaling down of memory devices. However, depolarizing electrostatic fields and interfacial chemical bonds can destroy this long-range polar order at two-dimensional (2D) limit. In this paper we report the experimental discovery of the locking between out-of-plane dipoles and in-plane lattice asymmetry in atomically thin In 2 Se 3 crystals, a new stabilization mechanism leading to our observation of intrinsic 2D out-of-plane ferroelectricity. Through second harmonic generation spectroscopy and piezoresponse force microscopy, we found switching of out-of-plane electric polarization requires a flip of nonlinear optical polarization that corresponds to the inversion of in-plane lattice orientation. The polar order shows a very high transition temperature (~700Κ) without the assistance of extrinsic screening. This finding of intrinsic 2D ferroelectricity resulting from dipole locking opens up possibilities to explore 2D multiferroic physics and develop ultrahigh density memory devices.

2-dimensional systems↗