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Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

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At least 181 records · Page 10
All sourcesNASA NTRSDOE OSTI
NASA NTRS1992

Bit-systolic arithmetic arrays using dynamic differential gallium arsenide circuits

A new family of gallium arsenide circuits for fine grained bit-systolic arithmetic arrays is introduced. This scheme combines features of two recent techniques of dynamic gallium arsenide FET logic and differential dynamic single-clock CMOS logic. The resulting circuits are fast and compact, with tightly constrained series FET propagation paths, low fanout, no dc power dissipation, and depletion FET implementation without level shifting diodes.

Beagles, Grant↗
NASA NTRS2009

Universal programmable logic gate and routing method

An universal and programmable logic gate based on G.sup.4-FET technology is disclosed, leading to the design of more efficient logic circuits. A new full adder design based on the G.sup.4-FET is also presented. The G.sup.4-FET can also function as a unique router device offering coplanar crossing of signal paths that are isolated and perpendicular to one another. This has the potential of overcoming major limitations in VLSI design where complex interconnection schemes have become increasingly problematic.

Fijany, Amir↗
NASA NTRS2018

Solid State Ephemeral Electric Potential and Electric Field Sensor

Systems, methods, and devices of the various embodiments provide a field effect transistor (FET) that controls equilibrium by reversing the effects of leakage currents affecting the gate response of the FET by using an equilibrium pump electrode. The equilibrium reversing gate FETs (ergFETs) of the various embodiments, may include an equilibrium pump electrode located within a non-conducting gap. The ergFETs of the various embodiments may provide solid state ephemeral electric potential and electric field sensor systems and methods for measuring ephemeral electric potentials and electric fields.

Generazio, Edward R.↗
DOE OSTI2021

EMI Mitigation of a Ćuk-Based Power-Electronic System Using Switching-Sequence-Based Control

Switching-sequence-based control (SBC) laws when designed based on topological switching behavior can have positive effects on slow- and fast-scale dynamics of a power-electronic system (PES). The slow-scale control can encompass fast PES state regulation and tracking, based on predefined objective, while fastscale control can address differential-mode (DM) and commonmode (CM) spectral-peak energy associated with PES switching operation. Such control laws may offer enhanced programmability to conventional PES design where bulky electromagnetic interference (EMI) filters have been traditionally used to reduce EMI of switching power converters to meet EMI regulatory standards. An EMI filter is always a less programmable solution since it is usually designed for the worst-case EMI mitigation and usually overkill for a PES operating under reduced load condition. The control scheme outlined in this article offers EMI mitigation across wide operating regions without compromising PES regulation. Moreover, it does so by use of switching sequences that guarantee the reachability of the PES dynamics using an advanced Lyapunov-function-based approach. SBC is a powerful tool to generate control actions for a PES based on multivariate PES state constraints. Hence, contemporary EMI regulatory standards are used as constraints in the SBC formulation to operate the PES under wide operating regime while autonomously mitigating the EMI levels. The work may be of paramount importance for operating the ultra-fast-transition recent wide-bandgap semiconductor devices like GaN–FET and SiC MOSFET under higher power with increasing switching frequencies, which is usually desirable for increased power density and reduced switching losses. Here, a hardware Cuk–PES operated ´ with GaN–FETs is fabricated and is used for case illustration. It is shown by experimental results how SBC mitigate DM and CM EMI noise of the PES while maintaining regulation even for the higher order nonminimum phase PES, while reducing sensor requirements using state observer derived from the switching model of the PES.

42 ENGINEERING↗
DOE OSTI2024

Size Effect of Negative Capacitance State and Subthreshold Swing in Van der Waals Ferrielectric Field–Effect Transistors

Analytical calculations corroborated by the finite element modeling show that thin films of Van der Waals ferrielectrics covered by a 2D-semiconductor are promising candidates for the controllable reduction of the dielectric layer capacitance due to the negative capacitance (NC) effect emerging in the thin films. The NC state is conditioned by energy-degenerated poly-domain states of the ferrielectric polarization induced in the films under incomplete screening conditions in the presence of a dielectric layer. Calculations performed for the FET-type heterostructure “ferrielectric CuInP 2 S 6 film—2D-MoS 2 single-layer—SiO 2 dielectric layer” reveal the pronounced size effect of the multilayer capacitance. Derived analytical expressions for the electric polarization and multilayer capacitance allow to predict the thickness range of the dielectric layer and ferrielectric film for which the NC effect is the most pronounced in various Van der Waals ferrielectrics, and the corresponding subthreshold swing becomes much less than the Boltzmann's limit. Obtained results can be useful for the size and temperature control of the NC effect in the steep-slope ferrielectric FETs.

36 MATERIALS SCIENCE↗
DOE OSTI2020

Molybdenum Contacts to MoS 2 Field‐Effect Transistors: Schottky Barrier Extraction, Electrical Transport, and Low‐Frequency Noise

MoS 2 has great interest for nanoscale electronic devices, including transistors and sensors. Defect‐free structure, clean interface with the gate dielectric, and metals with suitable metal–semiconductor junctions are key for reliable devices. Molybdenum is shown as an excellent electrode for MoS 2 field‐effect transistors (FETs), but the correlation among device current, field‐effect mobility, and the low‐frequency noise (LFN) with number of atomic layers is not studied. Furthermore, the impact of Mo/MoS 2 Schottky barrier on electronic injection and scattering in the device needs to be understood. Herein, by studying the FETs with channels of different numbers of atomic‐layer thicknesses, it is shown that a molybdenum metal contact to MoS 2 provides reliable current injection with low Schottky barrier height, low contact resistance, low electron–phonon scattering, and negligible impurity scattering. The mobility and LFN are optimal at a channel thickness of ≈12 atomic layers, which is consistent with the “mobility maximum window” in MoS 2 transistors with prior studies using other contact metals.

Kwon, Jiseok↗
DOE OSTI2021

Imaging Reconfigurable Molecular Concentration on a Graphene Field-Effect Transistor

The spatial arrangement of adsorbates deposited onto a clean surface under vacuum typically cannot be reversibly tuned. Here we use scanning tunneling microscopy to demonstrate that molecules deposited onto graphene field-effect transistors (FETs) exhibit reversible, electrically tunable surface concentration. Continuous gate-tunable control over the surface concentration of charged F 4 TCNQ molecules was achieved on a graphene FET at T = 4.5K. This capability enables the precisely controlled impurity doping of graphene devices and also provides a new method for determining molecular energy level alignment based on the gate-dependence of molecular concentration. Gate-tunable molecular concentration is explained by a dynamical molecular rearrangement process that reduces total electronic energy by maintaining Fermi level pinning in the device substrate. Finally, the molecular surface concentration is fully determined by the device back-gate voltage, its geometric capacitance, and the energy difference between the graphene Dirac point and the molecular LUMO level.

77 NANOSCIENCE AND NANOTECHNOLOGY↗
DOE OSTI2021

Transfer-Free Synthesis of Atomically Precise Graphene Nanoribbons on Insulating Substrates

The rational bottom-up synthesis of graphene nanoribbons (GNRs) provides atomically precise control of widths and edges that give rise to a wide range of electronic properties promising for electronic devices such as field-effect transistors (FETs). Since the bottom-up synthesis commonly takes place on catalytic metallic surfaces, the integration of GNRs into such devices requires their transfer onto insulating substrates, which remains one of the bottlenecks in the development of GNR-based electronics. Herein, we report on a method for the transfer-free placement of GNRs on insulators. This involves growing GNRs on a gold film deposited onto an insulating layer followed by gentle wet etching of the gold, which leaves the nanoribbons to settle in place on the underlying insulating substrate. Scanning tunneling microscopy and Raman spectroscopy confirm that atomically precise GNRs of high density uniformly grow on the gold films deposited onto SiO 2 /Si substrates and remain structurally intact after the etching process. We have also demonstrated transfer-free fabrication of ultrashort channel GNR FETs using this process. A very important aspect of the present work is that the method can scale up well to 12 in. wafers, which is extremely difficult for previous techniques. Our work here thus represents an important step toward large-scale integration of GNRs into electronic devices.

36 MATERIALS SCIENCE↗
DOE OSTI2024

Characterizing Defects Inside Hexagonal Boron Nitride Using Random Telegraph Signals in van der Waals 2D Transistors

Single-crystal hexagonal boron nitride (hBN) is used extensively in many two-dimensional electronic and quantum devices, where defects significantly impact performance. Therefore, characterizing and engineering hBN defects are crucial for advancing these technologies. Here, we examine the capture and emission dynamics of defects in hBN by utilizing low-frequency noise (LFN) spectroscopy in hBN-encapsulated and graphene-contacted MoS 2 field-effect transistors (FETs). The low disorder of this heterostructure allows the detection of random telegraph signals (RTS) in large device dimensions of 100 μm 2 at cryogenic temperatures. Analysis of gate bias- and temperature-dependent LFN data indicate that RTS originates from a single trap species within hBN. By performing multi-space density functional theory (MS-DFT) calculations on a gated defective hBN/MoS 2 heterostructure model, we assign substitutional carbon atoms in boron sites as the atomistic origin of RTS. This study demonstrates the utility of LFN spectroscopy combined with MS-DFT analysis on a low-disorder all-vdW FET as a powerful means for characterizing the atomistic defects in single-crystal hBN.

77 NANOSCIENCE AND NANOTECHNOLOGY↗
DOE OSTI2024

Tunnel junction-enabled monolithically integrated GaN micro-light emitting transistor

GaN/InGaN microLEDs are a very promising technology for next-generation displays. Switching control transistors and their integration are key components in achieving high-performance, efficient displays. Monolithic integration of microLEDs with GaN switching devices provides an opportunity to control microLED output power with capacitive (voltage)-controlled rather than current-controlled schemes. This approach can greatly reduce system complexity for the driver circuit arrays while maintaining device opto-electronic performance. In this work, we demonstrate a 3-terminal GaN micro-light emitting transistor that combines a GaN/InGaN blue tunneling-based microLED with a GaN n-channel FET. Further, the integrated device exhibits excellent gate control, drain current control, and optical emission control. This work provides a promising pathway for future monolithic integration of GaN FETs with microLED to enable fast switching, high-efficiency microLED display and communication systems.

42 ENGINEERING↗
DOE OSTI2024

Statistical analysis of displacement damage in small devices from neutron and ion irradiation

Modern semiconductor devices, such as gate-all-around nanosheet field-effect transistors (GAA NS FETs), are smaller than displacement damage cascades from fission neutrons. In this regime, device failure may occur through low-probability single events, rather than by parametric degradation previously seen in larger devices. Here, we present a statistical model that predicts the probability of a damage event in a small device and the probability distribution of the magnitude, i.e., number of displacements within the device, from each event. The model is developed first for neutron irradiation and then for energetic ion irradiation. The model is consistent with results from recent experiments in which lithium-ion irradiation produced stepwise increases in subthreshold current in GAA NS FETs.

Wampler, W. R.↗
DOE OSTI2025

Quantitative characterization of ZrO2 gate dielectric interface with tellurium

Tellurium (Te) has recently emerged as a promising p-type semiconductor that can be processed at low temperatures, compatible with back end of line CMOS integration. Characterization of tellurium–dielectric interfaces is essential for further device advancements. Here, the interface quality of Te with ZrO2 gate dielectric is studied in a metal-oxide semiconductor capacitor structure. The interface trap density (Dit) is measured as a function of atomic layer deposition (ALD) temperature, without the use of a seed layer. Given the low thermal budget of Te, the ALD temperature is shown to be particularly important. The lowest Dit of 5 × 1012 states/cm2 eV is obtained at a low ALD process temperature of 120 °C. To further assess the impact of Dit on device performance, field-effect transistors (FETs) were fabricated. The subthreshold swing and effective hole mobility of the FETs were analyzed in relation to Dit, emphasizing the importance of a defect-minimized interface for enhancing Te transistor performance.

Byeon, Kyeong-Jae↗
DOE OSTI2026

High-performance nanodevices based on WGe 2⁢ N 4 monolayer

Two-dimensional (2D) 𝑀⁢𝐴 2 ⁢𝑍 4 -family monolayers (MLs) have emerged as promising semiconductors due to their element tunability and rich electronic and optoelectronic properties. In this work, using first-principles calculations, we investigate the electronic, mechanical, transport, and optoelectronic properties of WGe 2⁢ N 4 ML with a small indirect bandgap. Various nanodevices based on WGe 2 ⁢N 4 ML are studied, including pn-junction diodes, pin-junction field-effect transistors (FETs), and phototransistors. The present results reveal that the WGe 2⁢ N 4 ML exhibits high rigidity, thermal stability, and remarkable light absorption. These nanodevices demonstrate excellent performance: (1) the pn-junction diode shows a high rectification ratio and a near-Shockley-limit ideality factor, (2) the pin-junction FET exhibits significant gate voltage modulation capability with subthreshold swing as low as 71 mV/dec (close to the theoretical limit calculated based on the Boltzmann distribution), and (3) the phototransistor displays strong optoelectronic responses in the visible and ultraviolet regions. Furthermore, these findings establish WGe 2 ⁢N 4 ML as a versatile platform for developing high-performance, multifunctional nanoelectronic and optoelectronic devices, significantly expanding the application potential of 𝑀⁢𝐴 2⁢ 𝑍 4 -family materials.

2-dimensional systems↗
NASA NTRS1973

Self-tuning bandpass filter

An electronic filter is described which simultaneously maintains a constant bandwidth and a constant center frequency gain as the input signal frequency varies, and remains self-tuning to that center frequency over a decade range. The filter utilizes a field effect transistor (FET) as a voltage variable resistance in the bandpass frequency determining circuit. The FET is responsive to a phase detector to achieve self-tuning.

Deboo, G. J.↗
NASA NTRS1973

Low phase noise digital frequency divider

A low phase noise frequency divider composed of a grating arrangement is disclosed. The grating arrangement supplies selected portions of an input reference signal to be divided to a tuned circuit without any phase noise due to the grating action. The arrangement which in one embodiment consists of an FET is connected to the tuned circuit input to short out the input except when the input reference signal amplitude crosses ground level in a positive direction and a gate enabling signal is present at the gate electrode of the FET. The gate enabling signal alone does not decouple the tuned circuit input from ground, therefore phase noise, due to the leading and trailing edges of each gate-enabling signal, is substantially eliminated.

Lutes, G. F., Jr.↗
NASA NTRS1975

Peak holding circuit for extremely narrow pulses

An improved pulse stretching circuit comprising: a high speed wide-band amplifier connected in a fast charge integrator configuration; a holding circuit including a capacitor connected in parallel with a discharging network which employs a resistor and an FET; and an output buffer amplifier. Input pulses of very short duration are applied to the integrator charging the capacitor to a value proportional to the input pulse amplitude. After a predetermined period of time, conventional circuitry generates a dump pulse which is applied to the gate of the FET making a low resistance path to ground which discharges the capacitor. When the dump pulse terminates, the circuit is ready to accept another pulse to be stretched. The very short input pulses are thus stretched in width so that they may be analyzed by conventional pulse height analyzers.

Oneill, R. W.↗
NASA NTRS1975

Low-noise extended-frequency response with cooled silicon photodiodes

It is shown that a substantial reduction in internal noise generated by the photodiode and the preamplifier can be produced by a modest cooling of the components and by optimization of preamplifier design. With this reduction the silicon detectors can, in the SNR range of 5 or greater, produce better performance than photon-noise-limited photomultipliers. The circuit noise and frequency response model suggested by Goranson and Skipper (1974) is expanded to include the effects of frequency dependent FET voltage noise and FET load resistance noise. The modeling of the photodiode and preamplifier is described and the noise characteristics of a 0.01 Hz to 100 kHz bandwidth detector/amplifier channel are evaluated.

Neiswander, R. S.↗
NASA NTRS1977

FM oscillator has improved deviation linearity

Device can be obtained by driving basic circuit through nonlinear FET input stage. Frequency of VCO is linearized with FET and total variance is varactor controlled. Experimental device exhibited linearity of better than plus or minus one percent for total frequency of plus or minus 10 millihertz.

Honnell, M. A.↗