Engineering Papers⌕ Search

SEARCH · Engineering Papers

Results for “Co-design”

Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

Quote a phrase for an exact phrase match. Source license links do not imply unrestricted reuse.

At least 181 records · Page 10
All sourcesNASA NTRSDOE OSTI
DOE OSTI2026

Systems-To-Atoms (S2A): enabling hydrogen for climate security

The project addresses a critical gap in hydrogen infrastructure by integrating system-level energy models with atomic-scale material simulations in a unified Systems-to-Atoms (S2A) framework. The motivation stems from the need to develop efficient, cost-effective, and durable hydrogen transport and utilization technologies to support decarbonization of hard-to-electrify sectors such as heavy-duty transportation. Current system models lack awareness of material performance mechanisms, while material-scale models do not account for system-level usage and variability. To bridge this divide, the team developed a co-simulation capability linking techno-economic analyses, reactor/process-flow modeling, and molecular-scale catalysis simulations. Applied to hydrogen delivery in California, the framework enabled comparative evaluations of compressed, cryogenic, and liquid organic hydrogen carrier (LOHC) pathways, highlighting how catalyst operation and unit process efficiency influence overall performance. The results demonstrate that no single material or transport mode is universally optimal; instead, heterogeneous solutions tuned to specific operational contexts deliver better performance. The project delivers a new capability for cross-scale material co-design, advancing hydrogen infrastructure readiness and informing DOE and LLNL missions in climate and energy resilience.

organic↗
DOE OSTI2023

Software Defined Architectures for Portability and Performance

The Software Defined Architectures for Portability and Performance (SODAPOP) project developed a co-design framework to partition and map converged applications on specialized heterogeneous architectures. We started from key domain applications that combine scientific simulation with data analytics and machine learning as drivers to integrate our framework. The framework includes high-level compilers that interfaces with high-level programming frameworks, domain-specific optimization passes, and hardware-oriented optimizations. The framework leverages hardware generators to enable specialization and facilitate exploration of custom system designs.

97 MATHEMATICS AND COMPUTING↗
DOE OSTI2026

Accelerating computing for the future electric grid (CRADA Final Report)

As a participant in the Cyclotron Road Lab-Embedded Entrepreneurship Program (LEEP), Vellex Computing, Inc. has successfully validated the "Vellex Computing Stack," a breakthrough Analog Neural Computer (ANC) specifically designed for high-performance edge optimization. This project achieved critical milestones in mixed-signal circuit stability and software-hardware co-design, directly addressing national priorities in semiconductor resiliency. The success of this work is deeply rooted in the support from the Cyclotron Road LEEP, which provided the essential "hard tech" runway—funding, mentorship, and access to Lawrence Berkeley National Laboratory’s world-class characterization facilities—allowing Vellex to overcome the "Valley of Death" often faced by deep-tech hardware startups. By leveraging LBNL’s advanced testing infrastructure, Vellex was able to rigorously benchmark the ANC architecture against state-of-the-art digital solutions, a feat that would have been resource-prohibitive independently. This collaboration has not only advanced American leadership in analog computing but has also matured Vellex’s technology to a stage ripe for private sector commercialization.

24 POWER TRANSMISSION AND DISTRIBUTION↗
DOE OSTI2026

Towards a Verifiable Domain-Specific Language for Hardware-Accelerated Stencils

Defining a domain-specific language (DSL) that supports vector-calculus abstractions eases the porting of partial differential equation (PDE) solvers to specialized architectures. Sufficiently high-level abstractions empower users to express universal laws with sufficient generality that the laws must always hold true within their domain of validity. A broad class of PDE solvers employs stencil-based algorithms, the target domain of Berkeley Lab's stencil accelerator chip co-design project. First released as open-source in January 2026, the Formal software framework lays a foundation for defining an embedded DSL based on composable operators that implement mimetic numerical methods -- stencil algorithms that guarantee satisfaction of discrete versions of important vector calculus theorems. The Formal DSL will be the frontend to a new class of stencil-PDE accelerators developed jointly by LBNL, UHCL, and UC Berkeley through the DOE Competitive Portfolios for Computer Science Project. This offers the potential of an order of magnitude acceleration for this important category of computational methods to serve the DOE mission. Future work on the Formal DSL will facilitate software verification via type-safe templates that enable problem-specific correctness proofs relying upon generic function theory and carefully crafted unit tests.

Rouson, Damian↗
DOE OSTI2023

FPGA Acceleration of GCN in Light of the Symmetry of Graph Adjacency Matrix

Graph Convolutional Neural Networks (GCNs) are widely used to process large-scale graph data. Different from deep neural networks (DNNs), GCNs are sparse, irregular, and unstructured, posing unique challenges to hardware acceleration with regular processing elements (PEs). In particular, the adjacency matrix of a GCN is extremely sparse, leading to frequent but irregular memory access, low spatial/temporal data locality and poor data reuse. Furthermore, a realistic graph usually consists of unstructured data (e.g., unbalanced distributions), creating significantly different processing times and imbalanced workload for each node in GCN acceleration. To overcome these challenges, we propose an end-to-end hardware-software co-design to accelerate GCNs on resource-constrained FPGAs with the features including: (1) A custom dataflow that leverages symmetry along the diagonal of the adjacency matrix to accelerate feature aggregation for undirected graphs. We utilize either the upper or the lower triangular matrix of the adjacency matrix to perform aggregation in GCN to improve data reuse. (2) Unified compute cores for both aggregation and transform phases, with full support to the symmetry-based dataflow. These cores can be dynamically reconfigured to the systolic mode for transformation or as individual accumulators for aggregation in GCN processing. (3) Preprocessing of the graph in software to rearrange the edges and features to match the custom dataflow. This step improves the regularity in memory access and data reuse in the aggregation phase. Moreover, we quantize the GCN precision from FP32 to INT8 to reduce the memory footprint without losing the inference accuracy. We implement our accelerator design in Intel Stratix10 MX FPGA board with HBM2, and demonstrate 1.3x-110.5x improvement in end-to-end GCN latency as compared to the state-of the-art FPGA implementations, on the graph datasets of Cora, Pubmed, Citeseer and Reddit.

Nair, Gopikrishnan R.↗
DOE OSTI2025

Dependable classical-quantum computing systems engineering

Increasing evidence suggests quantum computing (QC) complements traditional High-Performance Computing (HPC) by leveraging its unique capabilities, leading to the emergence of a new, hybrid paradigm, QHPC. However, this integration introduces new challenges, with dependability–defined by reproducibility, resiliency, and security and privacy–emerging as a central concern for building trustworthy systems that provide an advantage to the users. This paper proposes a framework for dependable QHPC system design, organized around these three pillars. We identify integration challenges, anticipate roadblocks, and highlight productive synergies across QC, HPC, cloud platforms, and network security. Drawing from both classical computing principles and quantum-specific insights, we present a roadmap for co-design that supports robust hybrid architectures. Our approach offers concrete metrics for assessing dependability, provides design guidance for engineers working at the QC-HPC interface, and surfaces new engineering questions around complexity, scale, and fault tolerance. Ultimately, designing for dependability is key to realizing practical, scalable QHPC systems and accelerating the broader quantum ecosystem capable of translating quantum promises into actual application delivery.

HPC↗
DOE OSTI2025

Structural Characterization of Linker Shielding in ADC Site-Specific Conjugates

Background/Objectives: Antibody–Drug Conjugates (ADCs) have rapidly evolved from early, rudimentary conjugates to highly targeted and precisely engineered molecules. Despite notable clinical successes, ADCs continue to face significant challenges, including aggregation and high hydrophobicity driven by high drug-to-antibody ratios (DARs), premature payload release, dose-limiting toxicities, and suboptimal pharmacokinetics. While site-specific linker–payload conjugation has improved ADC homogeneity and stability, the structural basis of antibody–linker interactions at specific sites remains underexplored. Methods: In this work, we present the crystal structures of trastuzumab Fab and Fc domains site-specifically conjugated with a cleavable linker–payload. Results: Our findings suggest that pockets within both Fab and Fc regions may interact with and shield the linker portion of the conjugate. Conclusions: These insights highlight the previously underappreciated potential of structure-based design to drive the optimization of ADC linker chemistry and facilitate the co-design of bespoke linker–payloads tailored to individual antibody conjugation sites.

Jaime-Garza, Maru [Discovery Chemistry, Merck & Co↗
DOE OSTI2025

hls4ml: A Flexible, Open-Source Platform for Deep Learning Acceleration on Reconfigurable Hardware

We present hls4ml, a free and open-source platform that translates machine learning (ML) models from modern deep learning frameworks into high-level synthesis (HLS) code that can be integrated into full designs for field-programmable gate arrays (FPGAs) or application-specific integrated circuits (ASICs). With its flexible and modular design, hls4ml supports a large number of deep learning frameworks and can target HLS compilers from several vendors, including Vitis HLS, Intel oneAPI and Catapult HLS. Together with a wider eco-system for software-hardware co-design, hls4ml has enabled the acceleration of ML inference in a wide range of commercial and scientific applications where low latency, resource usage, and power consumption are critical. In this paper, we describe the structure and functionality of the hls4ml platform. The overarching design considerations for the generated HLS code are discussed, together with selected performance results.

FOS: Computer and information sciences↗
DOE OSTI2026

Advanced-Research-on-Integrated-Energy-Systems-Based Analysis to Support Resilient System Upgrades: Energy to Communities Energyshed In-Depth Partnership with Molokai, Hawaii

The Molokai, Hawaii, Energy to Communities (E2C) Energyshed project represents a collaborative effort between the National Laboratory of the Rockies, Shake Energy Collaborative, the Molokai Clean Energy Hui, Sustainable Molokai, and Ho'ahu Energy Cooperative Molokai to advance Molokai's Community Energy Resilience Action Plan (CERAP). Supported by Hawaiian Electric Company and the Hawaii State Energy Office, the initiative aims to develop a community-defined portfolio of renewable energy solutions that enhance energy resilience while aligning with the Hawaiian Electric Integrated Grid Plan (IGP) and Molokai's energy goals. Phase 1 focused on technical analyses and community engagement to co-design feasible energy scenarios. Challenges such as grid upgrades, storage sizing, and inverter ride-through standards were addressed to align technical and operational requirements with community preferences. The project equips Molokai with actionable data and insights to implement energy initiatives while ensuring resilient and culturally informed solutions. Future efforts aim to finalize project designs, secure interconnection agreements, and deploy energy projects that reflect community priorities and technical feasibility.

24 POWER TRANSMISSION AND DISTRIBUTION↗
DOE OSTI2023

IP Protection in TinyML

Tiny machine learning (TinyML) is an essential component of emerging smart microcontrollers (MCUs). How- ever, the protection of the intellectual property (IP) of the model is an increasing concern due to the lack of desktop/server-grade resources on these power-constrained devices. In this paper, we propose STML, a system and algorithm co-design to Secure IP of TinyML on MCUs with ARM TrustZone. Our design jointly optimizes memory utilization and latency while ensuring the security and accuracy of emerging models. We implemented a prototype and benchmarked with 7 models, demonstrating STML reduces 40% of model protection runtime overhead on average.

42 ENGINEERING↗
DOE OSTI2024

Mathematics Integrated with Computer Science through Scratch: Curricular Modules for the Middle Grades

A project funded by the National Science Foundation, Computer Science Integrated with Mathematics in Middle Schools (CSIMMS) (DRL-1640039), brought middle-school mathematics teachers together with university computer science (CS) faculty and STEM education faculty to design, develop, and test curriculum modules in which CS is integrated into instruction for middle-school general-mathematics courses. The project developed integrated math/CS curriculum modules (for grades 6, 7, and 8), complete with student tasks and teacher materials to guide classroom implementation. Across the project, sixteen teachers from four middle schools representing different school contexts (both urban and suburban, serving students from a range of demographic and socioeconomic backgrounds) participated as members of the design team and trial testers of the math/CS modules. All modules underwent multiple years of testing and refinement, with extensive input from the teachers who co-designed and implemented them. Approximately 50-100 middle-school students participated in the classes of those who taught each year. The modules in this volume feature a range of models for integrating mathematics and computer science at the 6th and 7th grade levels. All modules foreground the teaching of grade-level mathematics content, with computer science functioning to motivate and/or reinforce these ideas.

Andrews larson, Christine↗
DOE OSTI2024

Extending Power of Nature from Binary Problems to Real-Valued Graph Learning in Real World

Nature performs complex computations constantly at clearly lower cost and higher performance than digital computers. It is crucial to understand how to harness the unique computational power of nature in Machine Learning (ML). In the past decade, besides the development of Neural Networks (NNs), the community has also relentlessly explored nature-powered ML paradigms. Although most of them are still predominantly theoretical, a new practical paradigm enabled by the recent advent of CMOS-compatible room-temperature nature-based computers has emerged. By harnessing the nature's power of entropy increase, this paradigm can solve binary learning problems delivering immense speedup and energy savings compared with NNs, while maintaining comparable accuracy. Regrettably, its values to the real world are highly constrained by its binary nature. A clear pathway to its extension to real-valued problems remains elusive. This paper aims to unleash this pathway by proposing a novel end-to-end Nature-Powered Graph Learning (NP-GL) framework. Specifically, through a three-dimensional co-design, NP-GL can leverage the nature's power of entropy increase to efficiently solve real-valued graph learning problems. Experimental results across 4 real-world applications with 6 datasets demonstrate that NP-GL delivers, on average, 6970X speedup and 10^5x energy consumption reduction with comparable or even higher accuracy than Graph Neural Networks (GNNs).

artificial intelligence↗
DOE OSTI2024

Wind Energy Accomplishments and Year-End Performance Report: Fiscal Year 2024

As the largest source of clean, renewable power generation in the United States and one of the fastest growing sources of new electricity supply, wind energy will play a large role in the nation's energy future. In Fiscal Year (FY) 2024, scientists, engineers, analysts, and support professionals at the U.S. Department of Energy's (DOE's) National Renewable Energy Laboratory (NREL) worked to accelerate the pace of innovation in wind energy science and technology, advance grid systems integration, and develop sustainable solutions to deployment challenges. Much of NREL's research, development, and deployment work aligns with addressing the Grand Challenges of Wind Energy. Beginning in 2019, DOE's Wind Energy Technologies Office partnered with the International Energy Agency to identify the barriers to greater wind energy deployment and related research gaps. The world's leading wind energy scientists and engineers identified five research areas as critical to advancing wind energy deployment: wind atmospheric science, wind turbine systems, wind plants and grid, environmental co-design, and social science. In FY 2024, NREL's accomplishments helped narrow the research gaps in these critical areas. This report provides details on those accomplishments.

accomplishments↗
DOE OSTI2025

hls4ml: A Flexible, Open-Source Platform for Deep Learning Acceleration on Reconfigurable Hardware

We present hls4ml, a free and open-source platform that translates machine learning (ML) models from modern deep learning frameworks into high-level synthesis (HLS) code that can be integrated into full designs for field-programmable gate arrays (FPGAs) or application-specific integrated circuits (ASICs). With its flexible and modular design, hls4ml supports a large number of deep learning frameworks and can target HLS compilers from several vendors, including Vitis HLS, Intel oneAPI and Catapult HLS. Together with a wider eco-system for software-hardware co-design, hls4ml has enabled the acceleration of ML inference in a wide range of commercial and scientific applications where low latency, resource usage, and power consumption are critical. In this paper, we describe the structure and functionality of the hls4ml platform. The overarching design considerations for the generated HLS code are discussed, together with selected performance results.

Schulte, Jan-Frederik [Purdue U.] (ORCID:000000034↗
DOE OSTI2026

On-chip probabilistic inference for charged-particle tracking at the sensor edge

Modern scientific instruments operate under increasingly extreme constraints on bandwidth, latency, and power. Inference at the sensor edge determines experimental data collection efficiency by deciding which information to save for further analysis. Particle tracking detectors at the Large Hadron Collider exemplify this challenge: pixelated silicon sensors generate rich spatiotemporal ionization patterns, yet most of this information is discarded due to data-rate limitations. Concurrently, advancements in co-design tools provide rapid turn-around for incorporating machine learning into application-specific integrated circuits, motivating designs for particle detectors with new integrated technologies. We demonstrate that neural networks embedded in the front-end electronics can infer charged-particle kinematic parameters from a single silicon layer. We regress hit positions and incident angles with calibrated uncertainties, while satisfying stringent constraints on numerical precision, latency, and silicon area. Our results establish a path toward probabilistic inference directly at the edge, opening new opportunities for intelligent sensing in high-rate scientific instruments.

Das, Arghya Ranjan [Purdue U.] (ORCID:000000018451↗
DOE OSTI2026

Efficient Routing of Quantum LDPC Codes on Programmable 2D Toric Architectures

Quantum low-density parity-check codes are promising candidates towards scalable fault-tolerant quantum computation. Among these, bivariate bicycle (BB) codes offer superior encoding rates and large code distance compared to surface codes. However, their requirement on long-range stabilizer measurements poses significant challenges for implementation on realistic hardware with limited connectivity, such as superconducting circuit platforms. In this work, we introduce a novel hardware-software co-design that leverages a programmable communication network architecture to address these limitations. Our approach utilizes a 2D toric network of oscillators as a flexible communication fabric linking qubits at each site. Such architecture significantly reduces the number of long-range couplers required from O ( n ) to O (√ n ). Dual-rail qubits, along with native gates including Swap-Wait-Swap gates and beamsplitter SWAPs, ensure that long-range two-qubit gates can be executed with high fidelity and low latency. To further enhance performance, our qubit layout and routing algorithm utilize symmetries of the codes and enable maximum parallelism for long-range two-qubit gates, maintaining a low syndrome extraction cycle duration and scalability over the code length. We perform circuit-level simulation with realistic noise modeling based on experimental hardware parameters, observing an logical error rate per logical qubit per cycle of 3.06% for [[18,4,4]] BB code, 2.6× less than the existing experimental result. These findings provide a practical roadmap and identify key technological advancements needed to achieve low-overhead fault-tolerant quantum computing at scale.

Liu, Kun [Yale Univ., New Haven, CT (United States↗
DOE OSTI2023

Aero‐servo‐elastic co‐optimization of large wind turbine blades with distributed aerodynamic control devices

Abstract This work introduces automated wind turbine optimization techniques based on full aero‐servo‐elastic models and investigates the potential of trailing edge flaps to reduce the levelized cost of energy (LCOE) of wind turbines. The Wind Energy with Integrated Servo‐control (WEIS) framework is improved to conduct the presented research. Novel methods for the generic implementation and tuning of trailing edge flap devices and their controller are also introduced. Primary flap and controller parameters are optimized to demonstrate potential maximum blade tip deflection reductions of 21 % . Concurrent design optimization (i.e., co‐design) of a novel segmented wind turbine blade with trailing edge flaps and its controller is then conducted to demonstrate blade cost savings of 5 % . Additionally, rotor diameter co‐design optimization is demonstrated to reduce the LCOE by 1.3 % without significant load increases to the tower. These results demonstrate the efficacy of control co‐design optimization using trailing edge flaps, and the entirety of this work provides a foundation for numerous control co‐design‐oriented studies for distributed aerodynamic control devices.

17 WIND ENERGY↗