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At least 181 records · Page 10

The PCM is Dead! Long Live O-PCM!

The ability to reconfigure the optical behavior of a device enables free-space applications ranging from imaging to sensing and signal control. Such optical devices can be compacted via meta-surfaces, patterned structures with feature sizes below the incident wavelength. Leveraging geometry in addition to material properties and CMOS fabrication techniques has allowed meta-surfaces for lenses, holograms, beam steerers and more. To incorporate multiple optical functions into one device, various methods of device control have been implemented, such as stretching of flexible substrates, tuning the refractive index of the comprising meta-atoms via the electro-optic or the thermo-optic effects, phase transition materials such as VO2 and more. Chalcogenide glasses used as optical phase change materials, such as Ge¬2Sb2Te5 (GST), have gained increased traction in the optics community for potential use in the near infrared (NIR) and mid infrared (MIR) bands, including the telecom bands. Various chalcogenides such as Sb2Se3, Sb2S3, Ge2Sb¬2Se5 and Ge2Sb2Se4Te (GSST) have been investigated due to their broad NIR or MIR transparency window and large changes in refractive index. In their amorphous phase, these materials usually display a lower refractive index and low absorption when compared to their crystalline state which display a higher refractive index and typically larger extinction coefficients. The amorphous-crystalline reversible switching can be done via fast melt-quenching thermal processes triggered by laser or electrical impulses, relying on a substrate as a heat sink. The potential of PCMs in photonic devices can be limited by intrinsic material limitations as well as by device fabrication issues. To explore the cyclability of GSST, a PCM with large refractive index contrast and on-chip electrothermal switching on a silicon-on-insulator platform has been done to analyze potential failure mechanisms from both a material and device perspective. A brief outline of the instrumentation and phase change contrast analysis is provided. Dewetting of the PCM, delamination of and damage in the PECVD SiNx protective layer, elemental migration in the PCM and optical contrast decay have been observed in cycled GSST devices. Guidelines for device performance improvement are proposed, and an improved design with larger endurance is shown in progress.

reconfigurable photonics↗

A Low-Power High-Speed Smart Sensor Design for Space Exploration Missions

A low-power high-speed smart sensor system based on a large format active pixel sensor (APS) integrated with a programmable neural processor for space exploration missions is presented. The concept of building an advanced smart sensing system is demonstrated by a system-level microchip design that is composed with an APS sensor, a programmable neural processor, and an embedded microprocessor in a SOI CMOS technology. This ultra-fast smart sensor system-on-a-chip design mimics what is inherent in biological vision systems. Moreover, it is programmable and capable of performing ultra-fast machine vision processing in all levels such as image acquisition, image fusion, image analysis, scene interpretation, and control functions. The system provides about one tera-operation-per-second computing power which is a two order-of-magnitude increase over that of state-of-the-art microcomputers. Its high performance is due to massively parallel computing structures, high data throughput rates, fast learning capabilities, and advanced VLSI system-on-a-chip implementation.

Fang, Wai-Chi↗

CubeX: A Compact X-Ray Telescope Enables Both X-Ray Fluorescence Imaging Spectroscopy and Pulsar Timing Based Navigation

This paper describes the benefits of a miniaturized X-ray telescope payload in the context of a lunar mission. The first part describes the payload in detail, the second part summarizes a small satellite mission concept that utilizes its compact form factor and performance. The CubeX instrument can be used for both X-ray fluorescence (XRF) imaging spectroscopy and X-ray pulsar timing based navigation (XNAV). Using our recent technological advances in X-ray optics and sensors, CubeX combines high angular resolution (<1 arcminutes) Miniature Wolter-I X-ray optics (MiXO) with a common focal plane consisting of high spectral resolution (<150 eV at 1 keV) CMOS X-ray sensors and a high timing resolution (< 1 usec) SDD X-ray sensor. This novel combination of the instruments enables both XRF measurements and XNAV operations without moving parts. The high angular resolution of the MiXO opens a wide range of orbital configurations for observation. Given that performance, the instrument has unprecedented small volume (~1×1×6U), mass (<6 kg), and power (<9W) requirements and opens a wide range of applications for a variety of targets and missions including NEOs and Martian moons. In this paper we illustrate one potential application for a lunar mission concept: The elemental composition of the Moon holds keys to understanding the origin and evolution of both the Moon and the Earth. X-ray fluorescence (XRF), induced either by solar X-ray flux or energetic ions, carries decisive signatures of surface elemental composition. X-ray observations, therefore, give a unique, powerful diagnostic tool for remotely determining elemental abundances including major rock forming elements such as Mg, Al, Na, Si, Fe, and Ca. Through high-resolution XRF imaging spectroscopy, CubeX searches for small patches of elusive lower crust and mantle material excavated within and around impact craters. CubeX identifies regional compositional variations and allows straightforward comparison of elemental distributions with the surface topography from LRO and the gravity data from GRAIL. The elemental compositions of the lower crust and the mantle are sensitive to the conditions of the giant impact which led to the Moon's formation and the subsequent lunar magma ocean (LMO), and thus they are key missing pieces in understanding the formation and early evolution of the Moon. In between XRF observations, CubeX also leverages the technology of high resolution X-ray imaging and time series measurements to conduct XNAV operations and evaluate their performance. Deep space navigation is a critical issue for small planetary missions. XNAV can enable low-cost autonomous deep-space navigation, and has the potential to greatly assist, or even outperform, NASA's Deep Space Network (DSN) or ESA's European Space Tracking (ESTRACK). CubeX is designed to perform sequential observations of 3-4 millisecond pulsars (MSPs) to solve the spacecraft trajectory for absolute navigation, and explore the remote sensing capability of XNAV. In the presented mission concept, the Moon's relative proximity enables a straightforward evaluation of the XNAV performance through DSN.

x-ray spectroscopy↗

Development and Operation of the Microshutter Array System

The microshutter array (MSA) is a key component in the James Webb Space Telescope Near Infrared Spectrometer (NIRSpec) instrument. The James Webb Space Telescope is the next generation of a space-borne astronomy platform that is scheduled to be launched in 2013. However, in order to effectively operate the array and meet the severe operational requirements associated with a space flight mission has placed enormous constraints on the microshutter array subsystem. This paper will present an overview and description of the entire microshutter subsystem including the microshutter array, the hybridized array assembly, the integrated CMOS electronics, mechanical mounting module and the test methodology and performance of the fully assembled microshutter subsystem. The NIRSpec is a European Space Agency (ESA) instrument requiring four fully assembled microshutter arrays, or quads, which are independently addressed to allow for the imaging of selected celestial objects onto the two 4 mega pixel IR detectors. Each microshutter array must have no more than approx.8 shutters which are failed in the open mode (depending on how many are failed closed) out of the 62,415 (365x171) total number of shutters per array. The driving science requirement is to be able to select up to 100 objects at a time to be spectrally imaged at the focal plane. The spectrum is dispersed in the direction of the 171 shutters so if there is an unwanted open shutter in that row the light from an object passing through that failed open shutter will corrupt the spectrum from the intended object.

Jhabvala, M. D.↗

HgCdTe 256x256 NWIR FPA

Researchers developed a HgCdTe 256x256 focal plane array (FPA) which operates in the 1 to 5 micron band. This is presently the largest demonstrated HgCdTe FPA. The detector material is HgCdTe on sapphire (PACE-1 technology) which has a low thermal expansion mismatch with silicon. The multiplexer is a CMOS FET-switch device processed through a commercial silicon foundry. The multiplexer input is direct injection and the charge capacity is about 2 times 10 to the 7th power electrons. The kTC limited read noise is 400 electrons. Researchers demonstrated high background imaging using the device. The broadband quantum efficiency is measured to be 59 percent. Dark currents less than 0.1 pA were measured at 77 K for detectors processed on PACE-1 material with 4.9 microns cutoff. The dark currents decrease as the temperature is lowered, and researchers are presently studying the T less than 77 K characteristics. The interconnect yield is greater than 95 percent. The devices are available for astronomical applications.

Vural, Kadri↗

ACE: Automatic Centroid Extractor for real time target tracking

A high performance video image processor has been implemented which is capable of grouping contiguous pixels from a raster scan image into groups and then calculating centroid information for each object in a frame. The algorithm employed to group pixels is very efficient and is guaranteed to work properly for all convex shapes as well as most concave shapes. Processing speeds are adequate for real time processing of video images having a pixel rate of up to 20 million pixels per second. Pixels may be up to 8 bits wide. The processor is designed to interface directly to a transputer serial link communications channel with no additional hardware. The full custom VLSI processor was implemented in a 1.6 mu m CMOS process and measures 7200 mu m on a side.

Cameron, K.↗

Fabricating a hybrid imaging device having non-destructive sense nodes

A hybrid detector or imager includes two substrates fabricated under incompatible processes. An array of detectors, such as charged-coupled devices, are formed on the first substrate using a CCD fabrication process, such as a buried channel or peristaltic process. One or more charge-converting amplifiers are formed on a second substrate using a CMOS fabrication process. The two substrates are then bonded together to form a hybrid detector.

Wadsworth, Mark↗

Fabricating a hybrid imaging device

A hybrid detector or imager includes two substrates fabricated under incompatible processes. An array of detectors, such as charged-coupled devices, are formed on the first substrate using a CCD fabrication process, such as a buried channel or peristaltic process. One or more charge-converting amplifiers are formed on a second substrate using a CMOS fabrication process. The two substrates are then bonded together to form a hybrid detector.

Wadsworth, Mark↗

A neural net based architecture for the segmentation of mixed gray-level and binary pictures

A neural-net-based architecture is proposed to perform segmentation in real time for mixed gray-level and binary pictures. In this approach, the composite picture is divided into 16 x 16 pixel blocks, which are identified as character blocks or image blocks on the basis of a dichotomy measure computed by an adaptive 16 x 16 neural net. For compression purposes, each image block is further divided into 4 x 4 subblocks; a one-bit nonparametric quantizer is used to encode 16 x 16 character and 4 x 4 image blocks; and the binary map and quantizer levels are obtained through a neural net segmentor over each block. The efficiency of the neural segmentation in terms of computational speed, data compression, and quality of the compressed picture is demonstrated. The effect of weight quantization is also discussed. VLSI implementations of such adaptive neural nets in CMOS technology are described and simulated in real time for a maximum block size of 256 pixels.

Tabatabai, Ali↗

Charge integration successive approximation analog-to-digital converter for focal plane applications using a single amplifier

An analog-to-digital converter for on-chip focal-plane image sensor applications. The analog-to-digital converter utilizes a single charge integrating amplifier in a charge balancing architecture to implement successive approximation analog-to-digital conversion. This design requires minimal chip area and has high speed and low power dissipation for operation in the 2-10 bit range. The invention is particularly well suited to CMOS on-chip applications requiring many analog-to-digital converters, such as column-parallel focal-plane architectures.

Zhou, Zhimin↗

High-Density, High-Bandwidth, Multilevel Holographic Memory

A proposed holographic memory system would be capable of storing data at unprecedentedly high density, and its data transfer performance in both reading and writing would be characterized by exceptionally high bandwidth. The capabilities of the proposed system would greatly exceed even those of a state-of-the art memory system, based on binary holograms (in which each pixel value represents 0 or 1), that can hold .1 terabyte of data and can support a reading or writing rate as high as 1 Gb/s. The storage capacity of the state-of-theart system cannot be increased without also increasing the volume and mass of the system. However, in principle, the storage capacity could be increased greatly, without significantly increasing the volume and mass, if multilevel holograms were used instead of binary holograms. For example, a 3-bit (8-level) hologram could store 8 terabytes, or an 8-bit (256-level) hologram could store 256 terabytes, in a system having little or no more size and mass than does the state-of-the-art 1-terabyte binary holographic memory. The proposed system would utilize multilevel holograms. The system would include lasers, imaging lenses and other beam-forming optics, a block photorefractive crystal wherein the holograms would be formed, and two multilevel spatial light modulators in the form of commercially available deformable-mirror-device spatial light modulators (DMDSLMs) made for use in high speed input conversion of data up to 12 bits. For readout, the system would also include two arrays of complementary metal oxide/semiconductor (CMOS) photodetectors matching the spatial light modulators. The system would further include a reference-beam sterring device (equivalent of a scanning mirror), containing no sliding parts, that could be either a liquid-crystal phased-array device or a microscopic mirror actuated by a high-speed microelectromechanical system. Time-multiplexing and the multilevel nature of the DMDSLM would be exploited to enable writing and reading of multilevel holograms. The DMDSLM would also enable transfer of data at a rate of 7.6 Gb/s or perhaps somewhat higher.

Chao, Tien-Hsin↗

Fast Imaging Detector Readout Circuits with In-Pixel ADCs for Fourier Transform Imaging Spectrometers

Focal plane arrays (FPAs) with high frame rates and many pixels benefit several upcoming Earth science missions including GEO-CAPE, GACM, and ACE by enabling broader spatial coverage and higher spectral resolution. FPAs for the PanFTS, a high spatial resolution Fourier transform spectrometer and a candidate instrument for the GEO-CAPE mission are the focus of the developments reported here, but this FPA technology has the potential to enable a variety of future measurements and instruments. The ESTO ACT Program funded the developed of a fast readout integrated circuit (ROIC) based on an innovative in-pixel analog-to-digital converter (ADC). The 128 X 128 pixel ROIC features 60 ?m pixels, a 14-bit ADC in each pixel and operates at a continuous frame rate of 14 kHz consuming only 1.1 W of power. The ROIC outputs digitized data completely eliminating the bulky, power consuming signal chains needed by conventional FPAs. The 128 X 128 pixel ROIC has been fabricated in CMOS and tested at the Jet Propulsion Laboratory. The current version is designed to be hybridized with PIN photodiode arrays via indium bump bonding for light detection in the visible and ultraviolet spectral regions. However, the ROIC design incorporates a small photodiode in each cell to permit detailed characterization of the ROICperformance without the need for hybridization. We will describe the essential features of the ROIC design and present results of ROIC performance measurements.

focal plane arrays (FPAs)↗

JPL CMOS Active Pixel Sensor Technology

This paper will present the JPL-developed complementary metal- oxide-semiconductor (CMOS) active pixel sensor (APS) technology. The CMOS APS has achieved performance comparable to charge coupled devices, yet features ultra low power operation, random access readout, on-chip timing and control, and on-chip analog to digital conversion. Previously published open literature will be reviewed.

Space Microelectronics Image Sensors APS Digital I↗

Development of Individually Addressable Micro-Mirror-Arrays for Space Applications

We have been developing a 32 x 32 prototype array of individually addressable Micro-Mirrors capable of operating at cryogenic temperature for Earth and Space Science applications. Micro-Mirror-Array technology has the potential to revolutionize imaging and spectroscopy systems for NASA's missions of the 21st century. They can be used as programmable slits for the Next Generation Space Telescope, as smart sensors for a steerable spectrometer, as neutral density filters for bright scene attenuation etc. The, entire fabrication process is carried out in the Detector Development Laboratory at NASA, GSFC. The fabrication process is low temperature compatible and involves integration of conventional CMOS technology and surface micro-machining used in MEMS. Aluminum is used as the mirror material and is built on a silicon substrate containing the CMOS address circuit. The mirrors are 100 microns x l00 microns in area and deflect by +/- 10 deg induced by electrostatic actuation between two parallel plate capacitors. A pair of thin aluminum torsion straps allow the mirrors to tilt. Finite-element-analysis and closed form solutions using electrostatic and mechanical torque for mirror operation were developed and the results were compared with laboratory performance. The results agree well both at room temperature and at cryogenic temperature. The development demonstrates the first cryogenic operation of two-dimensional Micro-Mirrors with bi-state operation. Larger arrays will be developed meeting requirements for different science applications. Theoretical analysis, fabrication process, laboratory test results and different science applications will be described in detail.

Dutta, Sanghamitra B.↗

Curvature-Based Wavefront Sensor for Use on Extended, Arbitrary, Low-Contract Scenes Final Technical Report August 2004

A small amount of work has been done on this project; the strategy to be adopted has been better defined, though no experimental work has been started. 1) Wavefront error signals: The best choice appears use a lenslet array at a pupil image to produce defocused image pairs for each subaperture. Then use the method proposed by Molodij et al. to produce subaperture curvature signals. Basically, this method samples a moderate number of locations in the image where the value of the image Laplacian is high, then taking the curvature signal from the difference of the Laplacians of the extrafocal images at those locations. The tip-tilt error is obtained from the temporal dependence of the first spatial derivatives of an in-focus image, at selected locations where these derivatives are significant. The wavefront tilt can be obtained from the full-aperture image. 2) Extrafocal image generation: The important aspect here is to generate symmetrically defocused images, with dynamically adjustable defocus. The adjustment is needed because larger defocus is required before the feedback loop is closed, and at times when the seeing is worse. It may be that the usual membrane mirror is the best choice, though other options should be explored. 3) Detector: Since the proposed sensor is to work on solar granulation, rather than a point source, an array detector for each subaperture is required. A fast CMOS camera such as that developed by the National Solar Observatory would be a satisfactory choice. 4) Processing: Processing requirements have not been defined in detail, though significantly fewer operations per cycle are required than for a correlation tracker.

LaBonte, Barry J.↗

Active-Pixel Image Sensor With Analog-To-Digital Converters

Proposed single-chip integrated-circuit image sensor contains 128 x 128 array of active pixel sensors at 50-micrometer pitch. Output terminals of all pixels in each given column connected to analog-to-digital (A/D) converter located at bottom of column. Pixels scanned in semiparallel fashion, one row at time; during time allocated to scanning row, outputs of all active pixel sensors in row fed to respective A/D converters. Design of chip based on complementary metal oxide semiconductor (CMOS) technology, and individual circuit elements fabricated according to 2-micrometer CMOS design rules. Active pixel sensors designed to operate at video rate of 30 frames/second, even at low light levels. A/D scheme based on first-order Sigma-Delta modulation.

Fossum, Eric R.↗

A bit-serial VLSI array processing chip for image processing

An array processing chip integrating 128 bit-serial processing elements (PEs) on a single die is discussed. Each PE has a 16-function logic unit, a single-bit adder, a 32-b variable-length shift register, and 1 kb of local RAM. Logic in each PE provides the capability to mask PEs individually. A modified grid interconnection scheme allows each PE to communicate with each of its eight nearest neighbors. A 32-b bus is used to transfer data to and from the array in a single cycle. Instruction execution is pipelined, enabling all instructions to be executed in a single cycle. The 1-micron CMOS design contains over 1.1 x 10 to the 6th transistors on an 11.0 x 11.7-mm die.

Heaton, Robert↗

Synthetic Tracking on a Small Telescope

Synthetic tracking uses high speed (up to 10 Hz) low noise (<2e-) large format sensors ~16 Mpix along with a multi-vector shift/add algorithm that coadds multiple image frames to increase the signal to noise ratio (SNR) needed to detect (if present) multiple moving objects in the field of view (FOV). We published the application of synthetic tracking to look for asteroids in 2014 (Shao 2014), but recently have applied it more as well to Earth orbiting objects. We have begun testing the data processing graphical processing unit (GPU) array with a small telescope, a 28 cm Celestron RASA telescope and a low cost low noise 16 Mpix CMOS camera at a dark site in California. This system is now operational with a 2 sqdeg FOV and a limiting magnitude between ~16-17.5 stellar magnitudes (mag) depending on a number of observational parameters for short integration times. The instrument can be used to search for NEOs, where we use much longer integration times to get sensitivity ~ 20.5 mag (at new moon). Synthetic tracking provides significant improvements in both sensitivity and astrometric accuracy.

Turyshev, Slava G.↗