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Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

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At least 181 records · Page 10
All sourcesNASA NTRSDOE OSTI
DOE OSTI2020

Genetic circuit characterization by inferring RNA polymerase movement and ribosome usage

To perform their computational function, genetic circuits change states through a symphony of genetic parts that turn regulator expression on and off. Debugging is frustrated by an inability to characterize parts in the context of the circuit and identify the origins of failures. Here, we take snapshots of a large genetic circuit in different states: RNA-seq is used to visualize circuit function as a changing pattern of RNA polymerase (RNAP) flux along the DNA. Together with ribosome profiling, all 54 genetic parts (promoters, ribozymes, RBSs, terminators) are parameterized and used to inform a mathematical model that can predict circuit performance, dynamics, and robustness. The circuit behaves as designed; however, it is riddled with genetic errors, including cryptic sense/antisense promoters and translation, attenuation, incorrect start codons, and a failed gate. While not impacting the expected Boolean logic, they reduce the prediction accuracy and could lead to failures when the parts are used in other designs. Finally, the cellular power (RNAP and ribosome usage) required to maintain a circuit state is calculated. This work demonstrates the use of a small number of measurements to fully parameterize a regulatory circuit and quantify its impact on host.

59 BASIC BIOLOGICAL SCIENCES↗
DOE OSTI2022

Statistical analysis on random quantum circuit sampling by Sycamore and Zuchongzhi quantum processors

Random quantum circuit sampling, a task to sample bit strings from a random quantum circuit, is considered a suitable benchmark task to demonstrate the outperformance of quantum computers even with noisy qubits. Recently, random quantum circuit sampling was performed on the Sycamore quantum processor with 53 qubits [Nature (London) 574, 505 (2019)] and on the Zuchongzhi quantum processor with 56 qubits [Phys. Rev. Lett. 127, 180501 (2021)]. Here, we analyze and compare the statistical properties of the outputs of the random quantum circuit sampling by the Sycamore and Zuchongzhi processors. Using the Marchenko-Pastur law of random matrices of bit strings and the Wasssertein distances between bit strings, we find that the statistical properties of Sycamore bit strings are quite different from those of Zuchongzhi bit strings, while both processors score similar values of linear cross-entropy fidelity for random circuit sampling. Some bit strings sampled by the Zuchongzhi processor pass the NIST random number tests while both Sycamore and Zuchongzhi processors show similar patterns in the heat maps of bit strings. Zuchongzhi bit strings are much closer to classical uniform random bits than those of Sycamore. It is shown that the statistical properties of bit strings of both random quantum circuits change little as the depth of the random quantum circuits increases. Our findings raise a question about the computational reliability of noisy quantum processors because two quantum processors with similar noise levels and similar qubit structures produced statistically different outputs for the same random quantum circuit sampling.

71 CLASSICAL AND QUANTUM MECHANICS, GENERAL PHYSIC↗
DOE OSTI2024

Scalable Circuits for Preparing Ground States on Digital Quantum Computers: The Schwinger Model Vacuum on 100 Qubits

The vacuum of the lattice Schwinger model is prepared on up to 100 qubits of IBM’s Eagle-processor quantum computers. A new algorithm to prepare the ground state of a gapped translationally invariant system on a quantum computer is presented, which we call “scalable circuits ADAPT-VQE” (SC-ADAPT-VQE). This algorithm uses the exponential decay of correlations between distant regions of the ground state, together with ADAPT-VQE, to construct quantum circuits for state preparation that can be scaled to arbitrarily large systems. These scalable circuits can be determined with use of classical computers, avoiding the challenging task of optimizing parameterized circuits on a quantum computer. SC-ADAPT-VQE is applied to the Schwinger model, and is shown to be systematically improvable, with an accuracy that converges exponentially with circuit depth. Both the structure of the circuits and the deviations of prepared wave functions are found to become independent of the number of spatial sites, L . This allows a controlled extrapolation of the circuits, determined with use of small or modest-sized systems, to arbitrarily large L . The circuits for the Schwinger model are determined on lattices up to L = 14 (28 qubits) with the Qiskit classical simulator, and are subsequently scaled up to prepare the L = 50 (100 qubits) vacuum on IBM’s 127-superconducting-qubit quantum computers ibm_brisbane and ibm_cusco. After introduction of an improved error-mitigation technique, which we call “operator decoherence renormalization”, the chiral condensate and charge-charge correlators obtained from the quantum computers are found to be in good agreement with classical matrix product state simulations. Published by the American Physical Society 2024

72 PHYSICS OF ELEMENTARY PARTICLES AND FIELDS↗
DOE OSTI2025

State Dependent Optimization with Quantum Circuit Cutting

Quantum circuits can be reduced through optimization to better fit the constraints of quantum hardware. One such method, initial-state dependent optimization (ISDO), reduces gate count by leveraging knowledge of the input quantum states. Surprisingly, we found that ISDO is broadly applicable to the downstream circuits produced by circuit cutting. Circuit cutting also requires measuring upstream qubits and has some flexibility of selection observables to do reconstruction. Therefore, we propose a state-dependent optimization (SDO) framework that incorporates ISDO, our newly proposed measure-state dependent optimization (MSDO), and a biased observable selection strategy. Building on the strengths of the SDO framework and recognizing the scalability challenges of circuit cutting, we propose nonseparate circuit cutting-a more flexible approach that enables optimizing gates without fully separating them. We validate our methods on noisy simulations of QAOA, QFT, and BV circuits. Results show that our approach consistently mitigates noise and improves overall circuit performance, demonstrating its promise for enhancing quantum algorithm execution on near-term hardware.

Li, Xinpeng↗
DOE OSTI2013

Recovery Act: High-Temperature Circuit Boards for use in Geothermal Well Monitoring Applications

The U.S. Department of Energy is leading the development of alternative energy sources that will ensure the long-term energy independence of our nation. One of the key renewable resources currently being advanced is geothermal energy. To tap into the large potential offered by generating power from the heat of the earth, and for geothermal energy to be more widely used, it will be necessary to drill deeper wells to reach the hot, dry rock located up to 10 km beneath the earth’s surface. In this instance, water will be introduced into the well to create a geothermal reservoir. A geothermal well produced in this manner is referred to as an enhanced geothermal system (EGS). EGS reservoirs are typically at depths of 3 to 10 km, and the temperatures at these depths have become a limiting factor in the application of existing downhole technologies. These high temperatures are especially problematic for electronic systems such as downhole data-logging tools, which are used to map and characterize the fractures and high-permeability regions in underground formations. Information provided by these tools is assessed so that underground formations capable of providing geothermal energy can be identified, and the subsequent drilling operations can be accurately directed to those locations. The mapping of geothermal resources involves the design and fabrication of sensor packages, including the electronic control modules, to quantify downhole conditions (300°C temperature, high pressure, seismic activity, etc.). Because of the extreme depths at which these measurements are performed, it is most desirable to perform the sensor signal processing downhole and then transmit the information to the surface. This approach necessitates the use of high-temperature electronics that can operate in the downhole environment. Downhole signal processing in EGS wells will require the development and demonstration of circuit boards that can withstand the elevated temperatures found at these depths. At present, the highest-temperature commercially available circuit boards are based on polyimide materials, and those have maximum use temperatures of 200 to 250°C. In addition to thermal stability, downhole electronics must also be fabricated into high-aspect-ratio packages. For example, the multilayer assemblies produced at SNL were approximately 2.5 cm wide and 50 cm long. Because of this very high form factor, glass-fiber-reinforced polymers are much more desirable than multilayer ceramic modules (MCM). MCMs have many advantages for some applications, but are susceptible to damage induced by the mechanical and vibrational loads commonly experienced by data-logging tools. Thus, as EGS technology continues to advance, there is a strong need for multilayer electronics that can provide the necessary thermal performance while also being compatible with high-form-factor circuit designs. This project involved the design and development of high-temperature circuit materials, as well as the fabrication and testing of circuit components. The material development included the evaluation of various polymer/fiberglass composites, whereas the circuit components were tested using conventional microelectronic evaluation techniques. This effort targeted development of a new class of high-temperature multilayer circuit boards for use in downhole data-logging applications where temperatures are on the order of 300°C. This is consistent with DOE’s multiyear plan for advancing technologies for use in enhanced geothermal systems. Organic and inorganic polymer systems, both with glass reinforcements, were considered to provide the following performance at elevated temperatures: • Mechanical strength and durability • High dielectric strength and electrical resistivity • Thermal stability • Strong adhesion to copper to ensure the reliability of the multilayer assemblies • Processing characteristics that are consistent with state-of-the-art multilayer circuit board manufacturing practices

15 GEOTHERMAL ENERGY↗
DOE OSTI2020

Using Reinforcement Learning to Optimize Quantum Circuits in thePresence of Noise

Many quantum computing frameworks currently use noise aware algorithms for implementing quantum circuits which do not scale efficiently as the size of the hardware architecture increases. As we move towards devices which utilize more qubits, it becomes increasing more important to map quantum circuits in a way that uses resources efficiently as well as maximizes the reliability of the results of that circuit. However, as the hardware increases to the point where Quantum supremacy is attainable, it will infeasible for a brute-force algorithm to find the most optimal circuit layout for circuits of medium to large depth sizes. To this end, we will to rely on reinforcement learning (RL) as a method of building quantum circuits based on observations of the noise characteristics in its environment. In this work, we create a working reinforcement learning environment in which an agent is able to make action which will build the class of circuits which creates the GHZ state. In addition to this, we also get preliminary results of the performance of a Deep Q Neural Network, which initially does not perform as well as we believe it can. In the future, we want to improve the performance of the agent and potentially generalize this environment to more classes of circuits.

71 CLASSICAL AND QUANTUM MECHANICS, GENERAL PHYSIC↗
NASA NTRS1997

Validation of an Accurate Three-Dimensional Helical Slow-Wave Circuit Model

The helical slow-wave circuit embodies a helical coil of rectangular tape supported in a metal barrel by dielectric support rods. Although the helix slow-wave circuit remains the mainstay of the traveling-wave tube (TWT) industry because of its exceptionally wide bandwidth, a full helical circuit, without significant dimensional approximations, has not been successfully modeled until now. Numerous attempts have been made to analyze the helical slow-wave circuit so that the performance could be accurately predicted without actually building it, but because of its complex geometry, many geometrical approximations became necessary rendering the previous models inaccurate. In the course of this research it has been demonstrated that using the simulation code, MAFIA, the helical structure can be modeled with actual tape width and thickness, dielectric support rod geometry and materials. To demonstrate the accuracy of the MAFIA model, the cold-test parameters including dispersion, on-axis interaction impedance and attenuation have been calculated for several helical TWT slow-wave circuits with a variety of support rod geometries including rectangular and T-shaped rods, as well as various support rod materials including isotropic, anisotropic and partially metal coated dielectrics. Compared with experimentally measured results, the agreement is excellent. With the accuracy of the MAFIA helical model validated, the code was used to investigate several conventional geometric approximations in an attempt to obtain the most computationally efficient model. Several simplifications were made to a standard model including replacing the helical tape with filaments, and replacing rectangular support rods with shapes conforming to the cylindrical coordinate system with effective permittivity. The approximate models are compared with the standard model in terms of cold-test characteristics and computational time. The model was also used to determine the sensitivity of various circuit parameters including typical manufacturing dimensional tolerances and support rod permittivity. By varying the circuit parameters of an accurate model using MAFIA, these sensitivities can be computed for manufacturing concerns, and design optimization previous to fabrication, thus eliminating the need for costly experimental iterations. Several variations were made to a standard helical circuit using MAFIA to investigate the effect that variations on helical tape and support rod width, metallized loading height and support rod permittivity, have on TWT cold-test characteristics.

Kory, Carol L.↗
NASA NTRS1996

Ground Isolation Circuit for Isolating a Transmission Line from Ground Interference

This invention relates generally to a system for isolating ground interference from a transmission line, e.g., a ground isolation circuit for isolating a wideband transmission signal (such as a video signal) from ground by modulating the base signal on a carrier signal to permit the transmission signal to be isolated. In one embodiment, the circuit includes a pair of matched mixer circuits, each of which receives a carrier signal from the same oscillator circuit. The first mixer circuit also receives the baseband signal input, after appropriate conditioning, and modulates the baseband signal onto the carrier signal. In a preferred embodiment the carrier signal has a predetermined frequency which is at least two times the frequency of the baseband signal. The modulated signal (which can comprise an rf signal) is transmitted via an rf transmission line to the second mixer, which demodulates the rf signal to recover the baseband signal. Each port of the mixer connects to an isolation transformer to ensure isolation from ground interference. The circuit is considered to be of commercial value in that it can provide isolation between transmitting and receiving circuits, e.g., ground isolation for television circuits or high frequency transmitters, without the need for video transformers or optical isolators, thereby reducing the complexity, power consumption, and weight of the system.

Davidson, Craig A.↗
NASA NTRS2002

Focal plane infrared readout circuit with automatic background suppression

A circuit for reading out a signal from an infrared detector includes a current-mode background-signal subtracting circuit having a current memory which can be enabled to sample and store a dark level signal from the infrared detector during a calibration phase. The signal stored by the current memory is subtracted from a signal received from the infrared detector during an imaging phase. The circuit also includes a buffered direct injection input circuit and a differential voltage readout section. By performing most of the background signal estimation and subtraction in a current mode, a low gain can be provided by the buffered direct injection input circuit to keep the gain of the background signal relatively small, while a higher gain is provided by the differential voltage readout circuit. An array of such readout circuits can be used in an imager having an array of infrared detectors. The readout circuits can provide a high effective handling capacity.

Pain, Bedabrata↗
NASA NTRS2005

Continuous, Full-Circle Arctangent Circuit

A circuit generates an analog voltage proportional to an angle, in response to two sinusoidal input voltages having magnitudes proportional to the sine and cosine of the angle, respectively. That is to say, given input voltages proportional to sin(Omega(t))sin(Theta) and sin(Omega(t))cos(Theta) [where Theta denotes the angle, mega denotes 2(pi) x a carrier frequency, and t denotes time], the circuit generates a steady voltage proportional to Theta. The output voltage varies continuously from its minimum to its maximum value as Theta varies from -180deg to 180deg. While the circuit could accept input modulated sine and cosine signals from any source, it must be noted that such signals are typical of the outputs of shaft-angle resolvers in electromagnetic actuators used to measure and control shaft angles for diverse purposes like aiming scientific instruments and adjusting valve openings. In effect, the circuit is an analog computer that calculates the arctangent of the ratio between the sine and cosine signals. The full-circle angular range of this arctangent circuit stands in contrast to the range of prior analog arctangent circuits, which is from slightly greater than -90deg to slightly less than +90deg. Moreover, for applications in which continuous variation of output is preferred to discrete increments of output, this circuit offers a clear advantage over resolver- to-digital integrated circuits.

Alhorn, Dean C.↗
DOE OSTI2016

Driver circuit for solid state light sources

A driver circuit for a light source including one or more solid state light sources, a luminaire including the same, and a method of so driving the solid state light sources are provided. The driver circuit includes a rectifier circuit that receives an alternating current (AC) input voltage and provides a rectified AC voltage. The driver circuit also includes a switching converter circuit coupled to the light source. The switching converter circuit provides a direct current (DC) output to the light source in response to the rectified AC voltage. The driver circuit also includes a mixing circuit, coupled to the light source, to switch current through at least one solid state light source of the light source in response to each of a plurality of consecutive half-waves of the rectified AC voltage.

24 POWER TRANSMISSION AND DISTRIBUTION↗
DOE OSTI2017

Deep Modeling: Circuit Characterization Using Theory Based Models in a Data Driven Framework

Analog computational circuits have been demonstrated to provide substantial improvements in power and speed relative to digital circuits, especially for applications requiring extreme parallelism but only modest precision. Deep machine learning is one such area and stands to benefit greatly from analog and mixed-signal implementations. However, even at modest precisions, offsets and non-linearity can degrade system performance. Furthermore, in all but the simplest systems, it is impossible to directly measure the intermediate outputs of all sub-circuits. The result is that circuit designers are unable to accurately evaluate the non-idealities of computational circuits in-situ and are therefore unable to fully utilize measurement results to improve future designs. In this paper we present a technique to use deep learning frameworks to model physical systems. Recently developed libraries like TensorFlow make it possible to use back propagation to learn parameters in the context of modeling circuit behavior. Offsets and scaling errors can be discovered even for sub-circuits that are deeply embedded in a computational system and not directly observable. The learned parameters can be used to refine simulation methods or to identify appropriate compensation strategies. We demonstrate the framework using a mixed-signal convolution operator as an example circuit.

Bolme, David S↗
DOE OSTI2017

Four-terminal circuit element with photonic core

A four-terminal circuit element is described that includes a photonic core inside of the circuit element that uses a wide bandgap semiconductor material that exhibits photoconductivity and allows current flow through the material in response to the light that is incident on the wide bandgap material. The four-terminal circuit element can be configured based on various hardware structures using a single piece or multiple pieces or layers of a wide bandgap semiconductor material to achieve various designed electrical properties such as high switching voltages by using the photoconductive feature beyond the breakdown voltages of semiconductor devices or circuits operated based on electrical bias or control designs. The photonic core aspect of the four-terminal circuit element provides unique features that enable versatile circuit applications to either replace the semiconductor transistor-based circuit elements or semiconductor diode-based circuit elements.

36 MATERIALS SCIENCE↗
DOE OSTI2020

Circuit board interconnect decals

A circuit component decal comprising a transparent sheet and an opaque circuit pattern. The transparent sheet includes opposing top and bottom surfaces and a number of edges. The opaque circuit pattern includes an electronic component footprint and a number of circuit lead paths. The electronic component footprint includes a number of contact points representing the location of leads of the electronic component. The circuit lead paths extend from the contact points to the edges of the transparent sheet. The opaque circuit pattern corresponds to only a section of a complete circuit pattern and is configured to block energy from reaching a first portion of the intermediate substrate when the transparent sheet is positioned on the intermediate substrate so as to form the section of the complete circuit pattern.

42 ENGINEERING↗
DOE OSTI2020

Circuit board and method of forming same

A circuit board comprising a substrate and a circuit trace. The substrate includes a surface etched via ion milling over a circuit area such that the surface has an increased roughness. The circuit trace forms portions of an electronic circuit and may be created from a thin conductive film deposited on the surface within the circuit area. The circuit trace adheres more strongly to the roughened substrate surface, which prevents the circuit trace from peeling or becoming delaminated from the substrate surface.

36 MATERIALS SCIENCE↗
DOE OSTI2021

Circuit for providing variable waveform excitation

A circuit for testing an electronic component, such as a transformer, includes at least two power supplies and at least two H bridge circuits. A first H bridge circuit is conductively coupled in parallel to a first power supply. A second H bridge circuit is conductively coupled in parallel to a second power supply. The second H bridge circuit includes one or more anti-series diodes for preventing current from the first power supply from passing through the second H bridge circuit to the second power supply. The first H bridge circuit and the second H bridge circuit are configured to conductively couple to the electronic component for providing a voltage with a predefined waveform to the electronic component.

Beddingfield, Richard B.↗
DOE OSTI2022

An Algebraic Quantum Circuit Compression Algorithm for Hamiltonian Simulation

Quantum computing is a promising technology that harnesses the peculiarities of quantum mechanics to deliver computational speedups for some problems that are intractable to solve on a classical computer. Current generation noisy intermediate-scale quantum (NISQ) computers are severely limited in terms of chip size and error rates. Shallow quantum circuits with uncomplicated topologies are essential for successful applications in the NISQ era. In this work, based on matrix analysis, we derive localized circuit transformations to efficiently compress quantum circuits for simulation of certain spin Hamiltonians known as free fermions. The depth of the compressed circuits is independent of simulation time and grows linearly with the number of spins. The proposed numerical circuit compression algorithm behaves backward stable and scales cubically in the number of spins enabling circuit synthesis beyond O(10 3 ) spins. The resulting quantum circuits have a simple nearest-neighbor topology, which makes them ideally suited for NISQ devices.

Hamiltonian simulation↗
DOE OSTI2021

Lower bounds on circuit depth of the quantum approximate optimization algorithm

The quantum approximate optimization algorithm (QAOA) is a method of approximately solving combinatorial optimization problems. While QAOA is developed to solve a broad class of combinatorial optimization problems, it is not clear which classes of problems are best suited for it. One factor in demonstrating quantum advantage is the relationship between a problem instance and the circuit depth required to implement the QAOA method. As errors in noisy intermediate-scale quantum (NISQ) devices increase exponentially with circuit depth, identifying lower bounds on circuit depth can provide insights into when quantum advantage could be feasible. In this work, we identify how the structure of problem instances can be used to identify lower bounds for circuit depth for each iteration of QAOA and examine the relationship between problem structure and the circuit depth for a variety of combinatorial optimization problems including MaxCut and MaxIndSet. Specifically, we show how to derive a graph, G, that describes a general combinatorial optimization problem and show that the depth of circuit is at least the chromatic index of G. By looking at the scaling of circuit depth, we argue that MaxCut, MaxIndSet, and some instances of vertex covering and Boolean satisfiability problems are suitable for QAOA approaches while knapsack and traveling salesperson problems are not.

97 MATHEMATICS AND COMPUTING↗