DOE OSTI · 1735295
Optimizing branch re-wiring in a software instruction cache
Abstract
A method includes a computer device receiving a branch instruction; the computer device managing two tables, where a first table relates to application blocks and a second table relates to available address slots; and the computer device calculating a target of the branch instruction using a branch-to-link register, the computer device optimizes re-wiring in a cache using the calculation and the managed two tables.
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Bertolli, Carlo, O'Brien, John Kevin Patrick, Eichenberger, Alexandre E., Sura, Zehra Noman. 2020-09-22. Optimizing branch re-wiring in a software instruction cache. https://www.osti.gov/biblio/1735295
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