NASA NTRS ยท 20100024466
Theorem Proving in Intel Hardware Design
Abstract
For the past decade, a framework combining model checking (symbolic trajectory evaluation) and higher-order logic theorem proving has been in production use at Intel. Our tools and methodology have been used to formally verify execution cluster functionality (including floating-point operations) for a number of Intel products, including the Pentium(Registered TradeMark)4 and Core(TradeMark)i7 processors. Hardware verification in 2009 is much more challenging than it was in 1999 - today s CPU chip designs contain many processor cores and significant firmware content. This talk will attempt to distill the lessons learned over the past ten years, discuss how they apply to today s problems, outline some future directions.
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O'Leary, John. 2009-04-01. Theorem Proving in Intel Hardware Design. https://ntrs.nasa.gov/citations/20100024466
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