NASA NTRS · 19890000383
Automatic Parametric Testing Of Integrated Circuits
Abstract
Computer program for parametric testing saves time and effort in research and development of integrated circuits. Software system automatically assembles various types of test structures and lays them out on silicon chip, generates sequency of test instructions, and interprets test data. Employs self-programming software; needs minimum of human intervention. Adapted to needs of different laboratories and readily accommodates new test structures. Program codes designed to be adaptable to most computers and test equipment now in use. Written in high-level languages to enhance transportability.
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Jennings, Glenn A., Pina, Cesar A.. 1989-07-01. Automatic Parametric Testing Of Integrated Circuits. https://ntrs.nasa.gov/citations/19890000383
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