NASA NTRS ยท 19780030154
Peripheral processors for high-speed simulation
Abstract
This paper describes some of the results of a study directed to the specification and procurement of a new cockpit simulator for an advanced class of helicopters. A part of the study was the definition of a challenging benchmark problem, and detailed analyses of it were made to assess the suitability of a variety of simulation techniques. The analyses showed that a particularly cost-effective approach to the attainment of adequate speed for this extremely demanding application is to employ a large minicomputer acting as host and controller for a special-purpose digital peripheral processor. Various realizations of such peripheral processors, all employing state-of-the-art electronic circuitry and a high degree of parallelism and pipelining, are available or under development. The types of peripheral processors array processors, simulation-oriented processors, and arrays of processing elements - are analyzed and compared. They are particularly promising approaches which should be suitable for high-speed simulations of all kinds, the cockpit simulator being a case in point.
Keep this discovery
Explore connections, maps & timelines
Karplus, W. J.. 1977-11-01. Peripheral processors for high-speed simulation. https://ntrs.nasa.gov/citations/19780030154
Cite the original work for its findings. Save a collection to share your selection of sources.