Hardware realization of sampled-data controllers

Abstract

This paper examines the hardware implementation process for digital controllers (filters), beginning with the desired z-domain transfer function of the digital compensator and ending in the selection of a hardware realization scheme. The final hardware realization is shown to be affected by quantization noise, dynamic range considerations, limit cycles, coefficient roundoff, and filter structure. A design example is included to illustrate the implementation process for a digital rate filter for vehicle control of the space shuttle. This paper develops open-loop techniques which may be extended to the closed-loop case.