NASA NTRS ยท 19720008496
Inexpensive programmable clock for a 12-bit computer
Abstract
An inexpensive programmable clock was built for a digital PDP-12 computer. The instruction list includes skip on flag; clear the flag, clear the clock, and stop the clock; and preset the counter with the contents of the accumulator and start the clock. The clock counts at a rate determined by an external oscillator and causes an interrupt and sets a flag when a 12-bit overflow occurs. An overflow can occur after 1 to 4096 counts. The clock can be built for a total parts cost of less than $100 including power supply and I/O connector. Slight modification can be made to permit its use on larger machines (16 bit, 24 bit, etc.) and logic level shifting can be made to make it compatible with any computer.
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Vrancik, J. E.. 1972-02-01. Inexpensive programmable clock for a 12-bit computer. https://ntrs.nasa.gov/citations/19720008496
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