Hybrid digital-analog implementation of digital filters
Hybrid device, which is modification of counting digital filter, obtains high speed through lower precision mainly effected by substituting analog device for digital counter.
Engineering topics
Publications and source records attributed to Zohar, S..
Hybrid device, which is modification of counting digital filter, obtains high speed through lower precision mainly effected by substituting analog device for digital counter.
Modification of conventional digital counting filter is designed to store all possible combinations of filter coefficients in random access memory. Filter includes analog-to-digital coverter, X shift register, memory, accumulator, and digital-to-analog converter.
The digital filtering algorithm of W. D. Little, which employs a large RAM to obtain high speed, is implemented in a simple hardware configuration. The nonrecursive version of this filter is compared to the counting digital filter and found to be competitive for low-order filters up to order 7 (8 coefficients).
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Two designs have been developed for cost-effective, fast transformation of data points in small batches (where N is equal to or less than 32). One design is applicable to N prime and one to all N.
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Several embodiments of a counting digital filter of the non-recursive type are disclosed. In each embodiment two registers, at least one of which is a shift register, are included. The shift register received j sub x-bit data input words bit by bit. The kth data word is represented by the integer.
Analysis of the bit-level operations involved in the convolution realizing a nonrecursive digital filter leads to hardware designs of digital filters based on the operation of counting. Two distinct designs are outlined: the first one is capable of very high speed but is rather expensive; the second is quite slow but has the advantages of low cost and high flexibility. The basic designs considered utilize fixed-point representation for the data and filter coefficients. Variants allowing floating-point representation of the coefficients are also described.
Analysis of the bit-level operations involved in the convolutions realizing recursive digital filters leads to hardware designs of such filters based on the operation of counting. Various designs realizing both the canonic and 'direct' forms are presented with particular emphasis on low-cost low-speed high-flexibility machines.
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