The Design Process of an Evolutionary Oriented Reconfigurable Architecture
This paper describes the design of a reconfigurable chip programmable at the transistor level and oriented to the implementation of Evolvable Hardware (EHW) experiements.
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Publications and source records attributed to Zebulum, R..
This paper describes the design of a reconfigurable chip programmable at the transistor level and oriented to the implementation of Evolvable Hardware (EHW) experiements.
Evolvable Hardware (EHW) refers to HW design and self-reconfiguration using evolutionary/genetic mechanisms. The paper presents an overview of some key concepts of EHW, describing also a set of selected applications.
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This article focuses on the properties of a fine grained reconfigurable transistor array currently under test at the Jet Propulsion Laboratory (JPL).
This paper introduces a third approach to Evolvable Hardware (EHW) called mixtrinsic EHW (MEHW).