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Yeh, C. S.

Publications and source records attributed to Yeh, C. S..

Calculations of the displacement damage and short-circuit current degradation in proton irradiated (AlGa)As-GaAs solar cells

A theoretical model for computing the displacement damage defect density and the short-circuit current (I sub sc) degradation in proton-irradiated (AlGa)As-GaAs p-n junction solar cells is presented. Assumptions were made with justification that the radiation induced displacement defects form an effective recombination center which controls the electron and hole lifetimes in the junction space charge region and in the n-GaAs active layer of the irradiated GaAs p-n junction cells. The degradation of I sub sc in the (AlGa)As layer was found to be negligible compared to the total degradation. In order to determine the I sub sc degradation, the displacement defect density, path length, range, reduced energy after penetrating a distance x, and the average number of displacements formed by one proton scattering event were first calculated. The I sub sc degradation was calculated by using the electron capture cross section in the p-diffused layer and the hole capture cross section in the n-base layer as well as the wavelength dependent absorption coefficients. Excellent agreement was found between the researchers calculated values and the measured I sub sc in the proton irradiated GaAs solar cells for proton energies of 100 KeV to 10 MeV and fluences from 10 to the 10th power p/square cm to 10 to the 12th power p/square cm.

Yeh, C. S.

Reed-Solomon Encoder

Report presents mathematical principles of Berlekamp bit serial multiplier algorithm and its application to design of very-large-scale integrated (VLSI) encoders for Reed-Solomon error-correcting codes. Structure made readily on single chip of negatively doped channel metal oxide semiconductor.

Troung, T. K.

A parallel VLSI architecture for a digital filter using a number theoretic transform

The advantages of a very large scalee integration (VLSI) architecture for implementing a digital filter using fermat number transforms (FNT) are the following: It requires no multiplication. Only additions and bit rotations are needed. It alleviates the usual dynamic range limitation for long sequence FNT's. It utilizes the FNT and inverse FNT circuits 100% of the time. The lengths of the input data and filter sequences can be arbitraty and different. It is regular, simple, and expandable, and as a consequence suitable for VLSI implementation.

Truong, T. K.

A parallel VLSI architecture for a digital filter of arbitrary length using Fermat number transforms

A parallel architecture for computation of the linear convolution of two sequences of arbitrary lengths using the Fermat number transform (FNT) is described. In particular a pipeline structure is designed to compute a 128-point FNT. In this FNT, only additions and bit rotations are required. A standard barrel shifter circuit is modified so that it performs the required bit rotation operation. The overlap-save method is generalized for the FNT to compute a linear convolution of arbitrary length. A parallel architecture is developed to realize this type of overlap-save method using one FNT and several inverse FNTs of 128 points. The generalized overlap save method alleviates the usual dynamic range limitation in FNTs of long transform lengths. Its architecture is regular, simple, and expandable, and therefore naturally suitable for VLSI implementation.

Truong, T. K.

The VLSI design of a Reed-Solomon encoder using Berlekamps bit-serial multiplier algorithm

Realization of a bit-serial multiplication algorithm for the encoding of Reed-Solomon (RS) codes on a single VLSI chip using NMOS technology is demonstrated to be feasible. A dual basis (255, 223) over a Galois field is used. The conventional RS encoder for long codes ofter requires look-up tables to perform the multiplication of two field elements. Berlekamp's algorithm requires only shifting and exclusive-OR operations.

Truong, T. K.