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Tran, Mua

Publications and source records attributed to Tran, Mua.

Embeddable Reconfigurable Neuroprocessors

Reconfigurable and cascadable building block neural network chips, fabricated using analog VLSI design tools, are interfaced to a PC. The building block chip designs, the cascadability and the hardware-in-the-loop supervised learning aspects of these chips are described.

Neuroprocessors