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Suszko, S. F.

Publications and source records attributed to Suszko, S. F..

Method of examining microcircuit patterns

Examination of microstructures of LSI and VLSI devices is facilitated by employing a method in which the device is photographed through a darkfield illumination optical microscope and the resulting negative subjected to inverse processing to form a positive on a photographic film. The film is then developed to form photographic prints or transparencies which clearly illustrate the structure of the device. The entire structure of a device may be examined by alternately photographing the device and selectively etching layers of the device in order to expose underlying layers.

Suszko, S. F.

Study of Contact Resistances in Integrated Circuits

Techniques explored in search for rapid, reliable test. Resistances of aluminum/silicon contacts and methods to measure subjects of NASA report. Study with three tasks undertaken to evaluate nature and reliability of large numbers of semiconductor contacts of type now being fabricated in integrated circuits: Develop yield analysis for series strings of contacts using wafer-level electrical measurements, and identify different types of faults by visual inspection; develop wafer-level tests to evaluate reliability of contact strings; and develop mathematical model for current flow in contacts and examine contact region for evidence of micro-alloying.

Buehler, M. G.

Analyzing Microchips With Dark-Field Negative Photomicrography

Inverse development process yields fine details. Photomicrographic technique produces images of integrated-circuit chips. Technique based on dark-field illumination: (chip lit with bright central spot of light and photographed by light scattered or diffracted from spot. Reveals more about microstructure patterns related to photoresist masking than more conventional bright-field method.

Suszko, S. F.

NSC 800, 8-bit CMOS microprocessor

The NSC 800 is an 8-bit CMOS microprocessor manufactured by National Semiconductor Corp., Santa Clara, California. The 8-bit microprocessor chip with 40-pad pin-terminals has eight address buffers (A8-A15), eight data address -- I/O buffers (AD(sub 0)-AD(sub 7)), six interrupt controls and sixteen timing controls with a chip clock generator and an 8-bit dynamic RAM refresh circuit. The 22 internal registers have the capability of addressing 64K bytes of memory and 256 I/O devices. The chip is fabricated on N-type (100) silicon using self-aligned polysilicon gates and local oxidation process technology. The chip interconnect consists of four levels: Aluminum, Polysi 2, Polysi 1, and P(+) and N(+) diffusions. The four levels, except for contact interface, are isolated by interlevel oxide. The chip is packaged in a 40-pin dual-in-line (DIP), side brazed, hermetically sealed, ceramic package with a metal lid. The operating voltage for the device is 5 V. It is available in three operating temperature ranges: 0 to +70 C, -40 to +85 C, and -55 to +125 C. Two devices were submitted for product evaluation by F. Stott, MTS, JPL Microprocessor Specialist. The devices were pencil-marked and photographed for identification.

Suszko, S. F.