Engineering topics
Publications and source records attributed to Stoica, A..
This paper describes the design of a reconfigurable chip programmable at the transistor level and oriented to the implementation of Evolvable Hardware (EHW) experiements.
Evolvable Hardware (EHW) refers to HW design and self-reconfiguration using evolutionary/genetic mechanisms. The paper presents an overview of some key concepts of EHW, describing also a set of selected applications.
Explore the source record for details and available documents.
This article focuses on the properties of a fine grained reconfigurable transistor array currently under test at the Jet Propulsion Laboratory (JPL).
This paper introduces a third approach to Evolvable Hardware (EHW) called mixtrinsic EHW (MEHW).
Outer solar system exploration and missions to comets and planets with severe environmental conditions require long-term survivability of space systems. This challenge has recently been approached with new ideas, such as using mechanisms for hardware adaptation inspired from biology.
The paper presents the concept and initial test from the hardware implementation of a low-power, high-speed reconfigurable sensor fusion processor.
Quantum mechanical simulations of carrier transport in Si require an accurate model of the complicated Si bandstructure. Tight-binding models are an attractive method of choice since they bear the full electronic structure symmetry in them and they can discretize a realistic device on an atomic scale.
The Nanoelectronic Modeling Tool (NEMO) is a general-purpose quantum device design and analysis tool based on a fundamental non-equilibrium electron transport theory.
The paper describes the architectual details of a fine-grained Programmable Transistor Array (PTA) architecture and illustrates its use in evolutionary experiments on the synthesis of both analog and digital circuits.
The paper introduces an approach to automated synthesis of CMOS circuits, based on evolution on a Programmable Transistor Array (PTA).
The paper presents the hardware implementation and initial tests from a low-power, high-speed reconfigurable sensor fusion processor.
A complex system of spacecraft and ground tracking stations, as well as a constellation of satellites or spacecraft, has to be able to reliably withstand sudden environment changes, resource fluctuations, dynamic resource configuration, limited communication bandwidth, etc., while maintaining the consistency of the system as a whole.
The paper presents the concept and initial tests from the hardware implementation of a low-power, high-speed reconfigurable sensor fusion processor. The Extended Logic Intelligent Processing System (ELIPS) processor is developed to seamlessly combine rule-based systems, fuzzy logic, and neural networks to achieve parallel fusion of sensor in compact low power VLSI.
Autonomous space systems will need to adapt to new environments and perform new functions, in addition to those specified at launch.
Evolvable Hardware is reconfigurable hardware that self-configures under the control of an evolutionary algorithm.
Material variations on an atomic scale enable the quantum mechanical functionality of devices such as resonant tunneling diodes (RTDs), quantum well infrared photodetectors (QWIPs), quantum well lasers, and heterostructure field effect transistors (HFETs).