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Statman, Joseph I.

Publications and source records attributed to Statman, Joseph I..

30 records · Page 2

Optimizing the Galileo Space Communication Link

The Galileo mission was originally designed to investigate Jupiter and its moons utilizing a high rate, X-band communication downlink with a maximum rate of 134.4 kb/s. However, following the failure of the high-gain antenna (HGA) to fully deploy, a completely new communication like design was established that is based on Galileo's S-band, low-gain antenna.

Gallileo↗

Decoder Synchronization for Deep Space Missions

The Consultative committee for Space Data STandards (CCSDS) recommends that space communication links employ a concatenated error-correcting channel-coding system in which the inner code is a convolutional (7, 2/2) code and the outer code is a (255,223) Reed-Solomon code.

Decoder↗

Software For Management Of A Packet-Radio Network

Network-management software assists in planning, monitoring, and controlling resources of Datalink network. Packet-message network featuring time-division multiple access, frequency and spatial diversity, and dynamic tree-structured routing scheme. Developed for communication between central control station on ground and instrumented aircraft flying over test range. Aircraft derives navigational data from satellites of Global Positioning System, and primary function of Datalink network feeding GPS position data from participating aircraft into control center in real time.

Smyth, Patrick J.↗

Large constraint length high speed viterbi decoder based on a modular hierarchial decomposition of the deBruijn graph

A method of formulating and packaging decision-making elements into a long constraint length Viterbi decoder which involves formulating the decision-making processors as individual Viterbi butterfly processors that are interconnected in a deBruijn graph configuration. A fully distributed architecture, which achieves high decoding speeds, is made feasible by novel wiring and partitioning of the state diagram. This partitioning defines universal modules, which can be used to build any size decoder, such that a large number of wires is contained inside each module, and a small number of wires is needed to connect modules. The total system is modular and hierarchical, and it implements a large proportion of the required wiring internally within modules and may include some external wiring to fully complete the deBruijn graph. pg,14.

Collins, Oliver↗

Digital Accumulators In Phase- And Frequency-Tracking Loops

Report describes investigation of deleterious effects of digital accumulators upon performances of phase- and frequency-tracking electronic circuits used to compute averages and reduce processing rates. Emphasizes problems encountered with respect to digital accumulators in operation of receivers in Global Positioning System (GPS). Also applicable to more general receivers or other signal-processing systems that include digital accumulators.

Hinedi, Sami↗

An estimator-predictor approach to PLL loop filter design

The design of digital phase locked loops (DPLL) using estimation theory concepts in the selection of a loop filter is presented. The key concept, that the DPLL closed-loop transfer function is decomposed into an estimator and a predictor, is discussed. The estimator provides recursive estimates of phase, frequency, and higher-order derivatives, and the predictor compensates for the transport lag inherent in the loop.

Statman, Joseph I.↗

Acquisition Of Spread-Spectrum Code

Effects of Doppler shift and data modulation taken into account. Two advanced schemes for acquisition of direct-sequence spread-spectrum codes proposed. M1-Lag correlator in each strip of spread-spectrum-code detector operates at different offset code-chip time. Each offset represents assumed (tentative) Doppler shift. Schemes have highly parallel architecture implemented with currently available technology. Possible to use hybrid parallel/serial architecture in which acquisition time varies in inverse proportion to number of correlators and fast-Fourier-transform processors.

Cheng, Unjeng↗

Spread-spectrum code acquisition in the presence of Doppler shift and data modulation

A spread-spectrum code acquisition technique for a direct-sequence (DS) system in the presence of Doppler effect and data modulation is investigated. Both the carrier-frequency offset and code-frequency offset due to severe Doppler effect are considered. The code-chip slipping during the correlation process caused by code-frequency offset can degrade the acquisition performance significantly. However, this issue can be alleviated by compensating code-frequency offset in an appropriate manner. Results are presented for the cases with and without data modulation. Coherent detection is considered when there is no data modulation. If data modulation is present, the authors partition the correlation time into subintervals and the integration results in these subintervals are square-law noncoherently combined for detection. The implementation of this code acquisition technique using the fast Fourier transform (FFT) algorithm is described. The use of theoretical results to estimate the hardware complexity of an actual system is illustrated step by step, showing that implementation is feasible with existing technology. The tradeoff between hardware complexity and acquisition performance is discussed.

Cheng, Unjeng↗

Digital accumulators in phase and frequency tracking loops

Results on the effects of digital accumulators in phase and frequency tracking loops are presented. Digital accumulators or summers are used extensively in digital signal processing to perform averaging or to reduce processing rates to acceptable levels. For tracking the Doppler of high-dynamic targets at low carrier-to-noise ratios, it is shown through simulation and experiment that digital accumulators can contribute an additional loss in operating threshold. This loss was not considered in any previous study and needs to be accounted for in performance prediction analysis. Simulation and measurement results are used to characterize the loss due to the digital summers for three different tracking loops: a digital phase-locked loop, a cross-product automatic frequency tracking loop, and an extended Kalman filter. The tracking algorithms are compared with respect to their frequency error performance and their ability to maintain lock during severe maneuvers at various carrier-to-noise ratios. It is shown that failure to account for the effect of accumulators can result in an inaccurate performance prediction, the extent of which depends highly on the algorithm used.

Hinedi, Sami↗

Digital phase-lock loop having an estimator and predictor of error

A digital phase-lock loop (DPLL) which generates a signal with a phase that approximates the phase of a received signal with a linear estimator. The effect of a complication associated with non-zero transport delays related to DPLL mechanization is then compensated by a predictor. The estimator provides recursive estimates of phase, frequency, and higher order derivatives, while the predictor compensates for transport lag inherent in the loop.

Statman, Joseph I.↗

Simplified solution for a class of fading memory filters

A fading memory filter is a least squares estimator (LSE) that applies an exponentially decaying weight to past measurements. When compared with a standard Kalman filter, its key advantages are asymptotic stability and reduced sensitivity to modeling errors. This paper derives a simple solution for a class of fading memory filters, resulting in a reduction in computational complexity. Steady state filter solutions are obtained for second- and third-order filters used in a global positioning system (GPS) receiver for high dynamic vehicles.

Statman, Joseph I.↗

Parameter estimation based on Doppler frequency shifts

An acoustic source generates an amplitude-modulated tone, with Doppler variations due to the relative motion between source and receiver. A method is presented for real-time estimation of tone rest frequency and minimal distance between source and receiver, using digital signal processing techniques. The algorithm presented here was implemented using a Texas Instruments TMS32010 processor.

Statman, Joseph I.↗