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Seguin-Moreau, N.

Publications and source records attributed to Seguin-Moreau, N..

Design, construction and commissioning of a technological prototype of a highly granular SiPM-on-tile scintillator-steel hadronic calorimeter

The CALICE collaboration is developing highly granular electromagnetic and hadronic calorimeters for detectors at future energy frontier electron-positron colliders. After successful tests of a physics prototype, a technological prototype of the Analog Hadron Calorimeter has been built, based on a design and construction techniques scalable to a collider detector. The prototype consists of a steel absorber structure and active layers of small scintillator tiles that are individually read out by directly coupled SiPMs. Each layer has an active area of 72 × 72 cm^2 and a tile size of 3 × 3 cm^2. With 38 active layers, the prototype has nearly 22,000 readout channels, and its total thickness amounts to 4.4 nuclear interaction lengths. The dedicated readout electronics provide time stamping of each hit with an expected resolution of about 1 ns. The prototype was constructed in 2017 and commissioned in beam tests at DESY. It recorded muons, hadron showers and electron showers at different energies in test beams at CERN in 2018. In this paper, the design of the prototype, its construction and commissioning are described. The methods used to calibrate the detector are detailed, and the performance achieved in terms of uniformity and stability is presented.

47 OTHER INSTRUMENTATION↗

A high-resolution clock phase shifter circuitry for ALTIROC

Abstract A high-resolution clock phase shifter is implemented to adjust the phase of multiple clocks at 40 MHz, 80 MHz, or 640 MHz in the ALTIROC chip. The phase shifter has a coarse-phase shifter and a fine-phase shifter to achieve a step size of 97.7 ps and an adjustable range of 25 ns. The fine delay unit is based on a Delay Locked Loop (DLL) operating at 640 MHz. The phase shifter is fabricated in a 130 nm CMOS process. The area of the phase shifter is 725 µm × 248 µm. The Differential Non-Linearity (DNL) and the Integral Non-Linearity (INL) are ±0.6 LSB and ±0.75 LSB, respectively. The jitter from −25 °C to 20 °C is less than 15.5 ps (RMS), including the contributions from the FPGA clock source and the PLL. The power consumption is 11.2 mW.

Instruments & Instrumentation↗

Signal formation and sharing in AC-LGADs using the ALTIROC 0 front-end chip

The development of detectors that provide high resolution in four dimensions has attracted wide-spread interest in the scientific community for applications in high-energy physics, nuclear physics, medical imaging, mass spectroscopy as well as quantum information. However, finding a technology capable of fulfilling such aspiration proved to be an arduous task. Among other silicon-based candidates, the Low-Gain Avalanche Diode (LGAD) has already shown excellent timing performances but proved to be unsuitable for fine pixelization. Therefore, the AC-coupled LGAD (AC-LGAD) approach was introduced to provide high resolution in both time and space, making it a promising candidate for future 4D detectors. However, appropriate readout electronics must be developed to match the sensor's fast-time and fine-pitch capabilities. This is currently a major technological challenge. Here, we test AC-LGAD prototypes read out by the fast-time ASIC ALTIROC 0, originally developed for the readout of DC-coupled LGADs for the ATLAS experiment at the High Luminosity-LHC. Signal generated by either betas from a 90 Sr source or a focused infra-red laser were analyzed. This paper details the first successful readout of an AC-LGAD sensor using a readout chip. This result will pave the way for the design and construction of a new generation of AC-LGAD-based 4D detectors.

46 INSTRUMENTATION RELATED TO NUCLEAR SCIENCE AND ↗