The Argo project is a DOE initiative for designing a modular operating system/runtime for the next generation of supercomputers. A key focus area in this project is power management, which is one of the main challenges on the path to exascale. In this paper, we discuss ideas for systemwide power management in the Argo project. We present a hierarchical and scalable approach to maintain a power bound at scale, and we highlight some early results.

Ellsworth, Daniel↗

DOE OSTI2016

Evaluating and extending user-level fault tolerance in MPI applications

The user-level failure mitigation (ULFM) interface has been proposed to provide fault-tolerant semantics in the Message Passing Interface (MPI). Previous work presented performance evaluations of ULFM; yet questions related to its programability and applicability, especially to non-trivial, bulk synchronous applications, remain unanswered. In this article, we present our experiences on using ULFM in a case study with a large, highly scalable, bulk synchronous molecular dynamics application to shed light on the advantages and difficulties of this interface to program fault-tolerant MPI applications. We found that, although ULFM is suitable for master–worker applications, it provides few benefits for more common bulk synchronous MPI applications. Furthermore, to address these limitations, we introduce a new, simpler fault-tolerant interface for complex, bulk synchronous MPI programs with better applicability and support than ULFM for application-level recovery mechanisms, such as global rollback.

97 MATHEMATICS AND COMPUTING↗

DOE OSTI2015

Exploiting Redundancy and Application Scalability for Cost-Effective, Time-Constrained Execution of HPC Applications on Amazon EC2

The use of clouds to execute high-performance computing (HPC) applications has greatly increased recently. Clouds provide several potential advantages over traditional supercomputers and in-house clusters. The most popular cloud is currently Amazon EC2, which provides fixed-cost and variable-cost, auction-based options. The auction market trades lower cost for potential interruptions that necessitate checkpointing; if the market price exceeds the bid price, a node is taken away from the user without warning. We explore techniques to maximize performance per dollar given a time constraint within which an application must complete. Specifically, we design and implement multiple techniques to reduce expected cost by exploiting redundancy in the EC2 auction market. We then design an adaptive algorithm that selects a scheduling algorithm and determines the bid price. We show that our adaptive algorithm executes programs up to seven times cheaper than using the on-demand market and up to 44 percent cheaper than the best non-redundant, auction-market algorithm. We extend our adaptive algorithm to incorporate application scalability characteristics for further cost savings. In conclusion, we show that the adaptive algorithm informed with scalability characteristics of applications achieves up to 56 percent cost savings compared to the expected cost for the base adaptive algorithm run at a fixed, user-defined scale.

97 MATHEMATICS AND COMPUTING↗

DOE OSTI2015

An Approach to Selecting Thread + Process Mixes for Hybrid MPI + OpenMP Applications, In: 2015 IEEE International Conference on Cluster Computing

Hybrid MPI + OpenMP is a popular means of programming modern machines that feature substantial parallelism both off-node and on-node. Determining the right mix of the two programming models to use, however, is not as straightforward as simply using exclusively OpenMP on-node and limiting MPI to only inter-node communication. We present a step-by-step methodology to help make the decision of which mix of the two programming models to use. It starts with an estimate of the performance of a generic hybrid application on a given machine and incorporates additional available information about the specific application and the machine to provide guidance for selecting effective mixes of MPI processes and OpenMP threads to use when running that application on the machine in question. We validate our approach on four different applications on an IBM Blue Gene/Q, a Cray XK7, and a Cray XC30.

Computer Science↗

DOE OSTI2015

Debugging high-performance computing applications at massive scales

In this work, dynamic analysis techniques help programmers find the root cause of bugs in large-scale parallel applications.

97 MATHEMATICS AND COMPUTING↗

DOE OSTI2015

Connecting Performance Analysis and Visualization to Advance Extreme Scale Computing

The characterization, modeling, analysis, and tuning of software performance has been a central topic in High Performance Computing (HPC) since its early beginnings. The overall goal is to make HPC software run faster on particular hardware, either through better scheduling, on-node resource utilization, or more efficient distributed communication.

97 MATHEMATICS AND COMPUTING↗

DOE OSTI2015

Ordering Traces Logically to Identify Lateness in Message Passing Programs

Event traces are valuable for understanding the behavior of parallel programs. However, automatically analyzing a large parallel trace is difficult, especially without a specific objective. We aid this endeavor by extracting a trace's logical structure, an ordering of trace events derived from happened-before relationships, while taking into account developer intent. Using this structure, we can calculate an operation's delay relative to its peers on other processes. The logical structure also serves as a platform for comparing and clustering processes as well as highlighting communication patterns in a trace visualization. We present an algorithm for determining this idealized logical structure from traces of message passing programs, and we develop metrics to quantify delays and differences among processes. We implement our techniques in Ravel, a parallel trace visualization tool that displays both logical and physical timelines. Rather than showing the duration of each operation, we display where delays begin and end, and how they propagate. As a result, we apply our approach to the traces of several message passing applications, demonstrating the accuracy of our extracted structure and its utility in analyzing these codes.

97 MATHEMATICS AND COMPUTING↗

DOE OSTI2014

Workshop on Modeling and Simulation of Systems and Applications, August 13-14, 2014, University of Washington, Seattle

In our efforts to continue the momentum toward quantitative understanding of the performance, power, and reliability of systems and applications, the modeling and simulation (hereafter ModSim) community gathered for its annual Workshop on Modeling & Simulation of Systems and Applications, held August 13-14, 2014 in Seattle. The 2014 Workshop on Modeling & Simulation of Systems and Applications, or ModSim 2014, focused on three critical technological areas: 1. Integrated Modeling and Simulation of Performance, Power, and Reliability; 2. Standards, Integration, and Interoperability of ModSim Methodologies and Tools; and 3. Advances in Core Modeling and Simulation Methods and Tools. The two-day meeting featured 21 presentations (based on peer-reviewed submissions) delivered over six parallel sessions, and there were six invited talks. Discussions aimed toward consolidating and directing this diverse technical community were especially beneficial as we continue to map out the future and form of ModSim research and development. This report presents a summary of the presentations, discussions, and findings culled from ModSim 2014. Each of the three critical technology areas are presented, structured as major research directions, gaps, cross-pollination, and path forward.

97 MATHEMATICS AND COMPUTING↗

DOE OSTI2014

Ordering Traces Logically to Identify Lateness in Parallel Programs

Event traces are a valuable tool for understanding the behavior of parallel programs. Automatically analyzing a large trace, however, especially without a specific objective, is difficult. We aid this process by extracting a trace’s logical structure, an ordering of events derived from their happened before relationships. From this perspective, we can calculate delays relative to peers rather than duration and determine where they begin and how they propagate. The logical structure also acts as a platform for comparing and clustering processes as well as showing communication patterns in a trace visualization. We present an algorithm for determining this idealized logical structure from a trace and develop metrics to quantify delays and differences among processes. We implement this in our novel trace visualizer, Ravel, and apply our approach to several applications, demonstrating the accuracy of our extracted structure and its utility in analyzing these codes.

97 MATHEMATICS AND COMPUTING↗

DOE OSTI2014

Connecting Performance Analysis and Visualization to Advance Extreme Scale Computing

In the first week of January 2014 Dagstuhl hosted a Perspectives Workshop on “Connecting Performance Analysis and Visualization to Advance Extreme Scale Computing”. The event brought together two previously separate communities – from Visualization and HPC Performance Analysis – to discuss a long term joined research agenda. The goal was to identify and address the challenges in using visual representations to understand and optimize the performance of extreme-scale applications running on today’s most powerful computing systems like climate modeling, combustion, material science or astro-physics simulations.

97 MATHEMATICS AND COMPUTING↗