Engineering topics

Reed, Irving S.

Publications and source records attributed to Reed, Irving S..

11 records

NASA NTRS1992

A VLSI architecture for simplified arithmetic Fourier transform algorithm

The arithmetic Fourier transform (AFT) is a number-theoretic approach to Fourier analysis which has been shown to perform competitively with the classical FFT in terms of accuracy, complexity, and speed. Theorems developed in a previous paper for the AFT algorithm are used here to derive the original AFT algorithm which Bruns found in 1903. This is shown to yield an algorithm of less complexity and of improved performance over certain recent AFT algorithms. A VLSI architecture is suggested for this simplified AFT algorithm. This architecture uses a butterfly structure which reduces the number of additions by 25 percent of that used in the direct method.

Reed, Irving S.↗

NASA NTRS1992

The algebraic decoding of the (41, 21, 9) quadratic residue code

A new algebraic approach for decoding the quadratic residue (QR) codes, in particular the (41, 21, 9) QR code is presented. The key ideas behind this decoding technique are a systematic application of the Sylvester resultant method to the Newton identities associated with the code syndromes to find the error-locator polynomial, and next a method for determining error locations by solving certain quadratic, cubic and quartic equations over GF(2 exp m) in a new way which uses Zech's logarithms for the arithmetic. The algorithms developed here are suitable for implementation in a programmable microprocessor or special-purpose VLSI chip. It is expected that the algebraic methods developed here can apply generally to other codes such as the BCH and Reed-Solomon codes.

Reed, Irving S.↗

NASA NTRS1992

Fast Transform Decoding Of Nonsystematic Reed-Solomon Codes

Fast, efficient Fermat number transform used to compute F'(x) analogous to computation of syndrome in conventional decoding scheme. Eliminates polynomial multiplications and reduces number of multiplications in reconstruction of F'(x) to n log (n). Euclidean algorithm used to evaluate F(x) directly, without going through intermediate steps of solving error-locator and error-evaluator polynomials. Algorithm suitable for implementation in very-large-scale integrated circuits.

Truong, Trieu-Kie↗

NASA NTRS1992

A VLSI design for a trace-back Viterbi decoder

A systolic Viterbi decoder for convolutional codes is developed which uses the trace-back method to reduce the amount of data needed to be stored in registers. It is shown that this new algorithm requires a smaller chip size and achieves a faster decoding time than other existing methods.

Truong, T. K.↗

NASA NTRS1990

VLSI single-chip (255,223) Reed-Solomon encoder with interleaver

The invention relates to a concatenated Reed-Solomon/convolutional encoding system consisting of a Reed-Solomon outer code and a convolutional inner code for downlink telemetry in space missions, and more particularly to a Reed-Solomon encoder with programmable interleaving of the information symbols and code correction symbols to combat error bursts in the Viterbi decoder.

Hsu, In-Shek↗

NASA NTRS1990

Fourier analysis and signal processing by use of the Moebius inversion formula

A novel Fourier technique for digital signal processing is developed. This approach to Fourier analysis is based on the number-theoretic method of the Moebius inversion of series. The Fourier transform method developed is shown also to yield the convolution of two signals. A computer simulation shows that this method for finding Fourier coefficients is quite suitable for digital signal processing. It competes with the classical FFT (fast Fourier transform) approach in terms of accuracy, complexity, and speed.

Reed, Irving S.↗

NASA NTRS1989

VLSI binary updown counter

A pipeline binary updown counter is comprised of simple stages that may be readily replicated. Each stage is defined by the Boolean logic equation: A(sub n)(t) = A(sub n)(t - 1) exclusive OR (U AND P(sub n)) inclusive OR (D AND Q(sub n)), where A(sub n)(t) denotes the value of the nth bit at time t. The input to the counter has three values represented by two binary signals U and D such that if both are zero, the input is zero, if U = 0 and D = 1, the input is -1 and if U = 1 and D = 0, the input is +1. P(sub n) represents a product of A(sub k)'s for 1 is less than or equal to k is less than or equal to -1, while Q(sub n) represents the product of bar A's for 1 is less than or equal to K is less than or equal to n - 1, where bar A(sub k) is the complement of A(sub k) and P(sub n) and Q(sub n) are expressed as the following two equations: P(sub n) = A(sub n - 1) A(sub n - 2)...A(sub 1) and Q(sub n) = bar A(sub n - 1) bar A(sub n - 2)...bar A(sub 1), which can be written in recursive form as P(sub n) = P(sub n - 1) AND bar A(sub n - 1) and Q(sub n) = Q(sub n - 1) AND bar A(sub n - 1) with the initial values P(sub 1) = 1 and Q(sub 1) = 1.

Truong, Trieu-Kie↗

NASA NTRS1988

On the VLSI design of a pipeline Reed-Solomon decoder using systolic arrays

A new very large scale integration (VLSI) design of a pipeline Reed-Solomon decoder is presented. The transform decoding technique used in a previous article is replaced by a time domain algorithm through a detailed comparison of their VLSI implementations. A new architecture that implements the time domain algorithm permits efficient pipeline processing with reduced circuitry. Erasure correction capability is also incorporated with little additional complexity. By using multiplexing technique, a new implementation of Euclid's algorithm maintains the throughput rate with less circuitry. Such improvements result in both enhanced capability and significant reduction in silicon area.

Shao, Howard M.↗

NASA NTRS1988

Method for Veterbi decoding of large constraint length convolutional codes

A new method of Viterbi decoding of convolutional codes lends itself to a pipline VLSI architecture using a single sequential processor to compute the path metrics in the Viterbi trellis. An array method is used to store the path information for NK intervals where N is a number, and K is constraint length. The selected path at the end of each NK interval is then selected from the last entry in the array. A trace-back method is used for returning to the beginning of the selected path back, i.e., to the first time unit of the interval NK to read out the stored branch metrics of the selected path which correspond to the message bits. The decoding decision made in this way is no longer maximum likelihood, but can be almost as good, provided that constraint length K in not too small. The advantage is that for a long message, it is not necessary to provide a large memory to store the trellis derived information until the end of the message to select the path that is to be decoded; the selection is made at the end of every NK time unit, thus decoding a long message in successive blocks.

Hsu, In-Shek↗

NASA NTRS1988

A pipeline design of a fast prime factor DFT on a finite field

A conventional prime factor discrete Fourier transform (DFT) algorithm is used to realize a discrete Fourier-like transform on the finite field, GF(q sub n). This algorithm is developed to compute cyclic convolutions of complex numbers and to decode Reed-Solomon codes. Such a pipeline fast prime factor DFT algorithm over GF(q sub n) is regular, simple, expandable, and naturally suitable for VLSI implementation. An example illustrating the pipeline aspect of a 30-point transform over GF(q sub n) is presented.

Truong, T. K.↗

NASA NTRS1987

FPT Algorithm for Two-Dimensional Cyclic Convolutions

Fast-polynomial-transform (FPT) algorithm computes two-dimensional cyclic convolution of two-dimensional arrays of complex numbers. New algorithm uses cyclic polynomial convolutions of same length. Algorithm regular, modular, and expandable.

Truong, Trieu-Kie↗