Engineering topics

Pierson, Lyndon G.

Publications and source records attributed to Pierson, Lyndon G..

4 records

DOE OSTI2019

Test circuits for integrated circuit counterfeit detection

Described herein are various technologies pertaining to identifying counterfeit integrated circuits (ICs) by way of allowing the origin of fabrication to be verified. An IC comprises a main circuit and a test circuit that is independent of the main circuit. The test circuit comprises at least one ring oscillator (RO) signal that, when energized, is configured to output a signal that is indicative of a semiconductor fabrication facility where the IC was manufactured.

Helinski, Ryan↗

DOE OSTI2019

Circuit that includes a physically unclonable function

Described herein are various technologies pertaining to authentication of integrated circuits by using external factors to affect or modify an output of a physically unclonable function (PUF) circuit. In an example, the output of the PUF circuit in response to a challenge signal can be sensitive to changes in environmental factors. In another example, the output of the PUF circuit can be sensitive to user-selectable configuration parameters of the PUF circuit. In yet another example, the output of the PUF circuit can be modified by additional circuitry external to the PUF circuit based upon one or more selectable or configurable inputs. A PUF-based device authentication system that uses external factors as authentication inputs to affect a challenge response of the device authentication system can enhance authentication capabilities by permitting multi-factor authentication.

42 ENGINEERING↗

DOE OSTI2019

Repeatable masking of sensitive data

The various technologies presented herein relate to enabling a value generated based upon a physical unclonable function (PUF) response to be available as needed, while also preventing exposure of the PUF to a malicious entity. A masked PUF response can be generated based upon applying a function to a combination of the PUF response and a data file (e.g., a bitstream), and the masked PUF response is forwarded to a requesting entity, rather than the PUF response. Hence, the PUF is masked from any entity requiring access to the PUF. The PUF can be located in a FPGA, wherein the data file is a bitstream pertinent to one or more configurable logic blocks included in the FPGA. A first masked PUF response generated with a first data file can have a different value to a second masked PUF response generated with a second data file.

Hamlet, Jason↗

DOE OSTI2018

Integrated circuit physically unclonable function

An integrated circuit (IC) based physically unclonable function (PUF) that comprises a common source amplifier for generating PUF output voltages, a unity gain, negative feedback operational amplifier for generating bias voltages, a voltage regulator and a bit exclusion circuit that excludes unstable PUF bits. Compensation circuitry built into the IC-PUF provides a high power supply rejection ratio and enables highly reliable operation of the IC-PUF across varying input voltages and operating temperatures. The IC-PUF generates a uniformly random output bit stream by taking advantage of process variations that are inherent to the fabrication of (metal-oxide semiconductor) MOS transistors.

42 ENGINEERING↗