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Pain, Bedabrata

Publications and source records attributed to Pain, Bedabrata.

At least 73 records · Page 4
All sourcesNASA NTRSDOE OSTI
NASA NTRS2001

High speed CMOS imager with motion artifact supression and anti-blooming

An image sensor includes pixels formed on a semiconductor substrate. Each pixel includes a photoactive region in the semiconductor substrate, a sense node, and a power supply node. A first electrode is disposed near a surface of the semiconductor substrate. A bias signal on the first electrode sets a potential in a region of the semiconductor substrate between the photoactive region and the sense node. A second electrode is disposed near the surface of the semiconductor substrate. A bias signal on the second electrode sets a potential in a region of the semiconductor substrate between the photoactive region and the power supply node. The image sensor includes a controller that causes bias signals to be provided to the electrodes so that photocharges generated in the photoactive region are accumulated in the photoactive region during a pixel integration period, the accumulated photocharges are transferred to the sense node during a charge transfer period, and photocharges generated in the photoactive region are transferred to the power supply node during a third period without passing through the sense node. The imager can operate at high shutter speeds with simultaneous integration of pixels in the array. High quality images can be produced free from motion artifacts. High quantum efficiency, good blooming control, low dark current, low noise and low image lag can be obtained.

Pain, Bedabrata↗
NASA NTRS2000

Delta-doped hybrid advanced detector for low energy particle detection

A delta-doped hybrid advanced detector (HAD) is provided which combines at least four types of technologies to create a detector for energetic particles ranging in energy from hundreds of electron volts (eV) to beyond several million eV. The detector is sensitive to photons from visible light to X-rays. The detector is highly energy-sensitive from approximately 10 keV down to hundreds of eV. The detector operates with milliwatt power dissipation, and allows non-sequential readout of the array, enabling various advanced readout schemes.

Cunningham, Thomas J.↗
NASA NTRS2000

Integrated infrared and visible image sensors

Semiconductor imaging devices integrating an array of visible detectors and another array of infrared detectors into a single module to simultaneously detect both the visible and infrared radiation of an input image. The visible detectors and the infrared detectors may be formed either on two separate substrates or on the same substrate by interleaving visible and infrared detectors.

Fossum, Eric R.↗
NASA NTRS2000

Active pixel sensor having intra-pixel charge transfer with analog-to-digital converter

An imaging device formed as a monolithic complementary metal oxide semiconductor Integrated circuit in an industry standard complementary metal oxide semiconductor process, the integrated circuit including a focal plane array of pixel cells, each one of the cells including a photogate overlying the substrate for accumulating photo-generated charge in an underlying portion of the substrate, a readout circuit including at least an output field effect transistor formed in the substrate, and a charge coupled device section formed on the substrate adjacent the photogate having a sensing node connected to the output transistor and at least one charge coupled device stage for transferring charge from the underlying portion of the substrate to the sensing node and an analog-to-digital converter formed in the substrate connected to the output of the readout circuit.

Fossum, Eric R.↗
NASA NTRS2000

Analysis and Enhancement of Low-Light-Level Performance of Photodiode-Type CMOS Active Pixel Images Operated with Sub-Threshold Reset

Noise in photodiode-type CMOS active pixel sensors (APS) is primarily due to the reset (kTC) noise at the sense node, since it is difficult to implement in-pixel correlated double sampling for a 2-D array. Signal integrated on the photodiode sense node (SENSE) is calculated by measuring difference between the voltage on the column bus (COL) - before and after the reset (RST) is pulsed. Lower than kTC noise can be achieved with photodiode-type pixels by employing "softreset" technique. Soft-reset refers to resetting with both drain and gate of the n-channel reset transistor kept at the same potential, causing the sense node to be reset using sub-threshold MOSFET current. However, lowering of noise is achieved only at the expense higher image lag and low-light-level non-linearity. In this paper, we present an analysis to explain the noise behavior, show evidence of degraded performance under low-light levels, and describe new pixels that eliminate non-linearity and lag without compromising noise.

Pain, Bedabrata↗
NASA NTRS1999

Active pixel sensor array with multiresolution readout

An imaging device formed as a monolithic complementary metal oxide semiconductor integrated circuit in an industry standard complementary metal oxide semiconductor process, the integrated circuit including a focal plane array of pixel cells, each one of the cells including a photogate overlying the substrate for accumulating photo-generated charge in an underlying portion of the substrate and a charge coupled device section formed on the substrate adjacent the photogate having a sensing node and at least one charge coupled device stage for transferring charge from the underlying portion of the substrate to the sensing node. There is also a readout circuit, part of which can be disposed at the bottom of each column of cells and be common to all the cells in the column. The imaging device can also include an electronic shutter formed on the substrate adjacent the photogate, and/or a storage section to allow for simultaneous integration. In addition, the imaging device can include a multiresolution imaging circuit to provide images of varying resolution. The multiresolution circuit could also be employed in an array where the photosensitive portion of each pixel cell is a photodiode. This latter embodiment could further be modified to facilitate low light imaging.

Fossum, Eric R.↗
NASA NTRS1999

Charge integration successive approximation analog-to-digital converter for focal plane applications using a single amplifier

An analog-to-digital converter for on-chip focal-plane image sensor applications. The analog-to-digital converter utilizes a single charge integrating amplifier in a charge balancing architecture to implement successive approximation analog-to-digital conversion. This design requires minimal chip area and has high speed and low power dissipation for operation in the 2-10 bit range. The invention is particularly well suited to CMOS on-chip applications requiring many analog-to-digital converters, such as column-parallel focal-plane architectures.

Zhou, Zhimin↗
NASA NTRS1997

Solid-state Image Sensor with Focal-plane Digital Photon-counting Pixel Array

A solid-state focal-plane imaging system comprises an NxN array of high gain. low-noise unit cells. each unit cell being connected to a different one of photovoltaic detector diodes, one for each unit cell, interspersed in the array for ultra low level image detection and a plurality of digital counters coupled to the outputs of the unit cell by a multiplexer(either a separate counter for each unit cell or a row of N of counters time shared with N rows of digital counters). Each unit cell includes two self-biasing cascode amplifiers in cascade for a high charge-to-voltage conversion gain (greater than 1mV/e(-)) and an electronic switch to reset input capacitance to a reference potential in order to be able to discriminate detection of an incident photon by the photoelectron (e(-))generated in the detector diode at the input of the first cascode amplifier in order to count incident photons individually in a digital counter connected to the output of the second cascade amplifier. Reseting the input capacitance and initiating self-biasing of the amplifiers occurs every clock cycle of an integratng period to enable ultralow light level image detection by the may of photovoltaic detector diodes under such ultralow light level conditions that the photon flux will statistically provide only a single photon at a time incident on anyone detector diode during any clock cycle.

Fossum, Eric R.↗
NASA NTRS1996

Active-Pixel Image Sensors With Programmable Resolution

Active-pixel image sensors with programmable resolution proposed for use in applications in which speed and efficiency of processing of image data enhanced by providing those data at varying resolutions. Such applications include modeling of biological vision, stereoscopic range-finding, recognition of patterns, tracking targets, and progressive transmission of compressed images. In target-tracking application, sensor initially forms low-resolution image from which area of interest identified, then sensor set at high resolution for examination of identified area. Outputs of contiguous pixels combined. Sensor of this type made to act as though it comprised fewer and larger pixels.

Kemeny, Sabrina E.↗
NASA NTRS1996

Recent Progress in On-Focal-Plane ADC

Two 8 bit successive approximation analog-to-digital converters (ADC) and a 12 bit current mode incremental sigma delta ADC have been designed, fabricated, and tested.

analog-to-digital converters adc↗
NASA NTRS1996

Programmable Multiresolution CMOS Active Pixel Sensor

CMOS active pixel sensors (APS) allow the flexibility of placing signal processing circuitry on the imaging focal plane. The multiresolution CMOS APS can perform block averaging on-chip to eliminate the off-chip software intensive image processing. This 128 x 128 APS array can be read out at any user-defined resolution by configuring a set of digital shift registers. The resolution frame rate is 30 Hz with higher rates for all other image resolutions.

APS↗
NASA NTRS1996

Progress in Voltage and Current Mode On-Chip Analog-to-Digital converters for CMOS Image Sensors

Two 8 bit successive approximation analog-to-digital converter (ADC) designs and a 12 bit current mode incremental sigma delta ADC have been designed, fabricated, and tested. The successive approximation test chip designs are compatible with active pixel sensor (APS) column parallel architectures with a 20.4 ??itch in a 1.2 ??-well CMOS process and a 40 ??itch in a 2 ??-well CMOS process. The successive approximation designs consume as little as 49 ??t a 500 KHz conversion rate meeting the low power requirements inherent in column parallel architectures. The current mode incremental sigma-delta ADC test chips designed to be multiplied among 8 columns in a semi-column parallel current mode APS architecture. The higher accuracy ADC consumes 800 ??t a 5 KHz.

analog-to-digital↗
NASA NTRS1996

CMOS Active Pixel Sensor Star Tracker with Regional Electronic Shutter

The guidance system in a spacecraft determines spacecraft attitude by matching an observed star field to a star catalog....An APS(active pixel sensor)-based system can reduce mass and power consumption and radiation effects compared to a CCD(charge-coupled device)-based system...This paper reports an APS (active pixel sensor) with locally variable times, achieved through individual pixel reset (IPR).

active pixel sensor CCD↗
NASA NTRS1995

Active-Pixel Image Sensor With Analog-To-Digital Converters

Proposed single-chip integrated-circuit image sensor contains 128 x 128 array of active pixel sensors at 50-micrometer pitch. Output terminals of all pixels in each given column connected to analog-to-digital (A/D) converter located at bottom of column. Pixels scanned in semiparallel fashion, one row at time; during time allocated to scanning row, outputs of all active pixel sensors in row fed to respective A/D converters. Design of chip based on complementary metal oxide semiconductor (CMOS) technology, and individual circuit elements fabricated according to 2-micrometer CMOS design rules. Active pixel sensors designed to operate at video rate of 30 frames/second, even at low light levels. A/D scheme based on first-order Sigma-Delta modulation.

Fossum, Eric R.↗
NASA NTRS1995

Noise-Reduction Circuit For Imaging Photodetectors

Developmental correlated-triple-sampling circuit suppresses capacitor reset noise and attenuates low frequency noise in integrated-and-sampled circuits of multiplexed photodiode arrays. Noise reduction circuit part of Visible and Infrared Mapping Spectrometer (VIMS) instrument to fly aboard Cassini spacecraft to explore Saturn and its moons. Modified versions of circuit also useful for reducing noise in terrestrial photosensor instruments.

Ramirez, Luis J.↗