CMOS imager with embedded analog early image processor
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Engineering topics
Publications and source records attributed to Pain, B..
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We present new CMOS photodiode imager pixel with ultra-low read noise through on-chip suppression of reset noise via column-based feedback circuitry. The noise reduction is achieved without introducing any image lag, and with insignificant reduction in quantum efficiency and full well.
A high-performance computational imager based on integration of CMOS active pixel imager array with on-chip signal processing and control via a new column-parallel architecture is presented.
This paper discusses common approaches to CMOS APS technology, as well as specific results on the five-wire programmable digital camera-on-a-chip developed at JPL. The paper also reports recent research in the design, operation, and performance of APS imagers for several imager applications.
Key optimal elements for space qualification plans of photonic devices are overviewed. Device parameters and qualifying procedures were discussed to assure the reliability of newly developed photonic devices needed for potential usage in space environments.
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Design and characterization of a high-performance multi-acuity, multi-window dynamicaly reconfigurable vision (DRV) CMOS imager for real-time staring vision systems is presented.
This paper presents a new technique for implementing a low-power CMOS imager with simultaneous on-chip computation of the difference and summ of two successive frames.
This paper presents a new technique for implementing a low-power CMOS imager with simultaneous on-chip computation of the difference and sum of two successive frames.
This presentation gives the status of theoretical and experimental efforts at JPL, in the development of environmentally robust (rad hard and rad tolerant), ultra-low power, high performance cmos active pixel sensor (aps) imagers for star tracker/imager applications.
This paper gives the status of theoretical and experimental efforts at JPL in the development of environmentally robust (radiation hard and radiation tolerant), ultra-low power, high performance CMOS active pixel sensor (APS) imagers for star tracker/imager applications.
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Silicon array readouts for microchannel plate intensifiers offer several attractive features. In this class of detector, the electron cloud output of the MCP intensifier is converted to visible light by a phosphor; that light is then fiber-optically coupled to the silicon array. In photon-counting mode, the resulting light splashes on the silicon array are recognized and centroided to fractional pixel accuracy by off-chip electronics. This process can result in very high (MCP-limited) spatial resolution for the readout while operating at a modest MCP gain (desirable for dynamic range and long term stability). The principal limitation of intensified CCD systems of this type is their severely limited local dynamic range, as accurate photon counting is achieved only if there are not overlapping event splashes within the frame time of the device. This problem can be ameliorated somewhat by processing events only in pre-selected windows of interest or by using an addressable charge injection device (CID) for the readout array. We are currently pursuing the development of an intriguing alternative readout concept based on using an event-driven CMOS Active Pixel Sensor. APS technology permits the incorporation of discriminator circuitry within each pixel. When coupled with suitable CMOS logic outside the array area, the discriminator circuitry can be used to trigger the readout of small sub-array windows only when and where an event splash has been detected, completely eliminating the local dynamic range problem, while achieving a high global count rate capability and maintaining high spatial resolution. We elaborate on this concept and present our progress toward implementing an event-driven APS readout.
Switching and amplifying characteristics of a newly developed two-dimesnional InGaAs Active Pixel Imager Array are presented.