Engineering topics

Munns, G.

Publications and source records attributed to Munns, G..

4 records

NASA NTRS1992

Superlattice barrier varactors

SBV (Single Barrier Varactor) diodes have been proposed as alternatives to Schottky barrier diodes for harmonic multiplier applications. However, these show a higher current than expected. The excess current is due to X valley transport in the barrier. We present experimental results showing that the use of a superlattice barrier and doping spikes in the GaAs depletion regions on either side of the barrier can reduce the excess current and improve the control of the capacitance vs. voltage characteristic. The experimental results consist of data taken from two types of device structures. The first test structure was used to study the performance of AlAs/GaAs superlattice barriers. The wafer was fabricated into 90 micron diameter mesa diodes and the resulting current vs. voltage characteristics were measured. A 10 period superlattice structure with a total thickness of approximately 400 A worked well as an electron barrier. The structure had a current density of about one A/sq cm at one volt at room temperature. The capacitance variation of these structures was small because of the design of the GaAs cladding layers. The second test structure was used to study cladding layer designs. These wafers were InGaAs and InAlAs layers lattice matched to an InP substrate. The layers have n(+) doping spikes near the barrier to increase the zero bias capacitance and control the shape of the capacitance vs. voltage characteristic. These structures have a capacitance ratio of 5:1 and an abrupt change from maximum to minimum capacitance. The measurements were made at 80 K. Based on the information obtained from these two structures, we have designed a structure that combines the low current density barrier with the improved cladding layers. The capacitance and current-voltage characteristics from this structure are presented.

Raman, C.↗

NASA NTRS1992

Modeling, design, fabrication, and testing of InP Gunn devices in the D-band (110 GHz - 170 GHz)

The development of fundamental Gunn sources for D-band frequencies requires improvements of doping profiles, processing technology, and circuit design. We have developed a technology for fabricating InP Gunn diodes using an InGaAs etch-stop layer between the InP substrate and the device layers. The epitaxial layers were grown by CBE. During device processing, the substrate is completely removed. Substrateless devices with an n(+) InGaAs cap layer are expected to have reduced contact and series resistances, and skin effect losses. This technology gives better uniformity and control of the device geometry across the processed chip. InP Gunn devices with a 1.7 micron long active region (doping : 9 x 10(exp 15) cm(exp -3)) have been mounted on copper heat sinks. Two tapered leads were then bonded to the diode and to four quartz standoffs. As a preliminary result, an output power of 13 mW at 82 GHz was obtained. Based on these RF measurements, we determine appropriate material parameters to be used in the Ensemble Monte Carlo model. Subsequently, we use this model to design and evaluate the performance of InP Gunn Devices for D-band frequencies. Using the same technology, we are currently processing Gunn devices with a 1 micron long active region for operation at higher frequencies.

Kamoua, R.↗

NASA NTRS1987

Characteristics of annealed p/n junctions between GaAs and Si(100)

Electrical characteristics of a GaAs(p)/Si(n) interface were determined from capacitance-voltage, current-voltage, and secondary ion mass spectroscopy (SIMS) measurements and compared to those on GaAs(p) epitaxial layers on GaAs(n) substrates. The comparison was made between the junctions as grown, and after an anneal at 850 C for 20 min in 10 percent forming gas under an As overpressure. For the GaAs/Si junction the ideality factor changed from 2 or larger to 1.5 and the apparent intercept voltage changed from 2.5 to 1.3 V after annealing. For the GaAs homojunction, the intercept voltage increased from 1.1 to 1.3 V. In addition, the excess current in the forward and reverse bias conditions dropped drastically in the heterojunction. No movement of the metallurgical junction was discernible to within the resolution capability of SIMS. The junction properties obtained by annealing suggest an atomic restructuring of the Si(100) interface during growth or annealing. These new results raise the possibility that the GaAs/Si interface can be made into an electrically viable junction and incorporated into active devices.

Unlu, M. S.↗

NASA NTRS1987

Investigation of GaAs/Al(x)Ga(1-x)As and In(y)Ga(1-y)As/GaAs superlattices on Si substrates

The optical properties of lattice-matched GaAs/Al(x)Ga(1-x)As and In(y)Ga(1-y)As/GaAs strained-layer superlattices grown on Si substrates have been studied using the photoreflectance technique. These preliminary results show that good quality III-IV epilayers can be grown on Si. The experimental data were compared with calculations based on the envelope-function approximation and fitted to the third-derivative functional form of reflectance modulation theory.

Reddy, U. K.↗