Engineering topics
Publications and source records attributed to Liao, Chunhua.
An AI-powered system for generating, reviewing, ranking, and evolving research hypotheses. It leverages Large Language Models (LLMs) for various tasks, including hypothesis generation, reflection, and comparison. The system is designed to assist researchers in exploring a research space and identifying promising hypotheses.
The increasing reliance on machine learning (ML) to analyze and optimize large-scale scientific applications on supercomputers faces a significant bottleneck: the lack of readily available, high-quality training datasets and the difficulty in reusing existing AI models. This project was motivated by the urgent need to address the “FAIR” principles (Findability, Accessibility, Interoperability, Reusability) for both training datasets and AI models in the high-performance computing (HPC) domain. The project developed HPC-FAIR, a high-performance computing data management framework designed to centralize HPC-related datasets and AI models within a unified hub. To ensure interoperability, the framework established a standardized representation and vocabulary (ontology) for both data and models. HPC-FAIR also implemented automated workflows to streamline data processing, model access, and benchmarking. Additionally, the project focused on optimizing data harnessing efficiency through advanced techniques like deep reuse and compression-based analytics.
This datastet contains kernels extracted from OpenMP microbenchmarks collected in DataRaceBench. The purpose of this dataset is to serve as training data for machine learning with programming language processing (PLP).
Abstract The program state is formed by the values that the program manipulates. These values are stored in the stack, in the heap, or in static memory. The ability to inspect the program state is useful as a debugging or as a verification aid. Yet, there exists no general technique to insert inspection points in type‐unsafe languages such as C or C++. The difficulty comes from the need to traverse the memory graph in a so‐called uncooperative environment. In this article, we propose an automatic technique to deal with this problem. We introduce a static code transformation approach that inserts in a program the instrumentation necessary to report its internal state. Our technique has been implemented in LLVM. It is possible to adjust the granularity of inspection points trading precision for performance. In this article, we demonstrate how to use inspection points to debug compiler optimizations; to augment benchmarks with verification code; and to visualize data structures.
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CUDAMicroBench is a collection of fourteen microbenchmarks that demonstrate performance challenges in CUDA programming and techniques to optimize the CUDA programs to address these challenges. It also includes examples and techniques for using advanced CUDA features such as data shuffling between threads, dynamic parallelism, etc that can help users optimize the CUDA program for performance.
XPlacer Machine Learning Guided Data Placement uses machine learning model to assist programmers to select the data placement advises for application running on HPC system with Nvidia GPUs. XPlacer Machine Learning Guided Data Placement consists three components: (1) 4 revised benchmarks from Rodinia benchmarks; (2) compiler script and execution script to generate variants, and collect training data for the machine learning model; (3) the scripts to post-process the collected data and generate the machine leaning model.
XPlacer/Tracer is a dynamic analysis tool that finds bad memory access patterns in heterogeneous codes. XPlacer/Tracer consists of two components. (1) A configurable ROSE plugin for source code instrumentation of heterogeneous code written in the C/C++ and CUDA programming languages. (2) A sample configuration that instruments memory accesses to dynamic memory in CPU and GPU codes, and a runtime library that tracks these memory accesses at runtime. The collected information is reported in form of a textual summary or as memory map that can be converted to images.
In high performance computing (HPC), often a wide range of knowledge about the particular domains, software applications, and hardware architectures are necessary for applying the right optimizations in the appropriate contexts. In today’s practice, however, such knowledge has been expressed and managed in an ad-hoc manner by each individual. Systematic accumulation, sharing and reuse of the knowledge across a broad community has been difficult. This paper introduces OpenK, an ontology-based open infrastructure for solving the problem. By centering around ontology – a generic knowledge representation – and extensible designs, it offers a promising support for lowering the barriers.
High-performance computing is susceptible to data-race bugs. Data races occur when sequences of computed events do not happen in the intended order, a significant barrier to the integrity of parallel programs using shared-memory architectures. Many approaches to data-race detection are based on traditional static-analysis techniques that typically execute on a program’s source code or control-flow graph (the graphical representation of all possible orders of events in the execution of a program). Similar to classical data-flow analyses, such tools can produce false alarms that report spurious race conditions on error free programs. We have developed a software verification technique that requires as input only a program’s source code and can automatically detect a data-race bug which definitely exists, determine that a program is definitely data-race free, or report that it cannot determine either of the two cases.