Engineering topics
Publications and source records attributed to Lambe, John.
Thin films of Mn02-x at intersections between metallic row and column conductors serve as switching elements for nonvolatile electronic memories. "On"-state resistance adjustable, and on-to-off transition irreversible. Elements electrically programmable and especially suitable for use in associative electronic memories based on neural-network concepts.
Memory cells in a matrix are provided by a thin film of amorphous semiconductor material overlayed by a thin film of resistive material. An array of parallel conductors on one side perpendicular to an array of parallel conductors on the other side enable the amorphous semiconductor material to be switched in addressed areas to be switched from a high resistance state to a low resistance state with a predetermined level of electrical energy applied through selected conductors, and thereafter to be read out with a lower level of electrical energy. Each cell may be fabricated in the channel of an MIS field-effect transistor with a separate common gate over each section to enable the memory matrix to be selectively blanked in sections during storing or reading out of data. This allows for time sharing of addressing circuitry for storing and reading out data in a synaptic network, which may be under control of a microprocessor.
Photovoltaic device senses hydrogen developed to test degradation of diodes with platinum flash gates on backs. Sensing element is p/n junction rather than conventional Schottky barrier or metal oxide/silicon field-effect transistor. Hydrogen-indicating electrical signal modulated optically rather than electrically. Layered structure of hydrogen detector and principle of operation resemble silicon solar photovoltaic cell. Hydrogen detector responds to hydrogen in atmosphere within minutes and recovers quickly when hydrogen removed.
High resistances prevent hotspots in parallel input and output operation. Nonvolatile computer memory combines ultrahigh storage density with extremely-low power dissipation. Accommodates about 1 billion bits in square centimeter of surface area. Bit written with expenditure of less than 1 nanojoule of energy and read with even lower energy. Developed for parallel input and output operation.
Circuit-chip area used more efficiently. Proposed gate structure selectively allows and restricts access to blocks of memory in electronic neural-type network. By breaking memory into independent blocks, gate greatly simplifies problem of reading from and writing to memory. Since blocks not used simultaneously, share operational amplifiers that prompt and read information stored in memory cells. Fewer operational amplifiers needed, and chip area occupied reduced correspondingly. Cost per bit drops as result.
Memory based on neural network models content-addressable and fault-tolerant. System includes electronic equivalent of synaptic network; particular, matrix of programmable binary switching elements over which data distributed. Switches programmed in parallel by outputs of serial-input/parallel-output shift registers. Input and output terminals of bank of high-gain nonlinear amplifiers connected in nonlinear-feedback configuration by switches and by memory-prompting shift registers.
This paper examines some of the present work on the development of electronic neural network hardware. In particular, the investigations currently under way at JPL on neural network hardware implementations based on custom VLSI technology, novel thin film materials, and an analog-digital hybrid architecture are reviewed. The availability of such hardware will greatly benefit and enhance the present intense research effort on the potential computational capabilities of highly parallel systems based on neural network models.
An electronic embodiment of a neural network based associative memory in the form of a binary connection matrix is described. The nature of false memory errors, their effect on the information storage capacity of binary connection matrix memories, and a novel technique to eliminate such errors with the help of asymmetrical extra connections are discussed. The stability of the matrix memory system incorporating a unique local inhibition scheme is analyzed in terms of local minimization of an energy function. The memory's stability, dynamic behavior, and recall capability are investigated using a 32-'neuron' electronic neural network memory with a 1024-programmable binary connection matrix.