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Kappes, J. Mark

Publications and source records attributed to Kappes, J. Mark.

Modem Handles Data At 160 Mb/s

Trellis-coded octal-phase-shift-keying modem transmits and receives continuous or bursted digital data for satellite applications. Helps satisfy increasing demands for communication of high-speed digital data from sources like high-performance computers and high-definition television transmitters, as well as multiplexed signals from slower signal sources. Increases maximum effective bit rate accommodated in standard 72-MHz-wide commercial satellite-transponder radio channel from 120 Mb/s to 160 Mb/s. Principal advantages: spectral efficiency and power efficiency.

Budinger, James M.

Advanced modulation technology development for earth station demodulator applications. Coded modulation system development

A jointly optimized coded modulation system is described which was designed, built, and tested by COMSAT Laboratories for NASA LeRC which provides a bandwidth efficiency of 2 bits/s/Hz at an information rate of 160 Mbit/s. A high speed rate 8/9 encoder with a Viterbi decoder and an Octal PSK modem are used to achieve this. The BER performance is approximately 1 dB from the theoretically calculated value for this system at a BER of 5 E-7 under nominal conditions. The system operates in burst mode for downlink applications and tests have demonstrated very little degradation in performance with frequency and level offset. Unique word miss rate measurements were conducted which demonstrate reliable acquisition at low values of Eb/No. Codec self tests have verified the performance of this subsystem in a stand alone mode. The codec is capable of operation at a 200 Mbit/s information rate as demonstrated using a codec test set which introduces noise digitally. The measured performance is within 0.2 dB of the computer simulated predictions. A gate array implementation of the most time critical element of the high speed Viterbi decoder was completed. This gate array add-compare-select chip significantly reduces the power consumption and improves the manufacturability of the decoder. This chip has general application in the implementation of high speed Viterbi decoders.

Miller, Susan P.