Engineering topics

Kapoor, Vik J.

Publications and source records attributed to Kapoor, Vik J..

9 records

NASA NTRS1997

Investigation of Field Emitter Array Vacuum Microtriodes for Space Electronics Applications

Research into processing techniques for fabrication of vacuum microelectronic devices has been carried out, with special emphasis being given to the growth of silicon dioxide thin films. Oxide films ranging from 30 nm to approximately 2 micrometers have been grown on single crystal silicon wafers. Metal-oxide-semiconductor capacitor test structures have been made from some of these oxide films, and current-versus-voltage plots for these structures have been measured. It has been observed that the rate of applied voltage across the oxide films produces marked differences in measured leakage current. Breakdown fields across two of the thinnest oxide films have been measured and are comparable with highest values reported in literature. Several silicon wafers were processed to make field- emitter array diodes, and were delivered to collaborators at NASA-Lewis Research Center for final fabrication steps and testing.

Smith, Mark A.↗

NASA NTRS1991

Submicron gate InP power MISFET's with improved output power density at 18 and 20 GHz

The microwave characteristics are presented at 18 and 20 GHz of submicron gate indium phosphide (InP) metal-insulator-semiconductor field-effect transistors (MISFETs) for high output power density applications. InP power MISFET's were fabricated and the output power density was investigated as a function of drain-source spacing. The best output power density and gain were obtained for drain-source spacing of 3 micron. The output power density is 2.7 times greater than was previously measured for InP MISFET's at 18 and 20 GHz, and the power-added efficiency also increased.

Biedenbender, Michael D.↗

NASA NTRS1991

Indium gallium arsenide microwave power transistors

Depletion-mode InGaAs microwave power MISFETs with 1-micron gate lengths and up to 1-mm gate widths have been fabricated using an ion-implantation process. The devices employed a plasma-deposited silicon/silicon dioxide gate insulator. The dc I-V characteristics and RF power performance at 9.7 GHz are presented. The output power, power-added efficiency, and power gain as a function of input power are reported. An output power of 1.07 W with a corresponding power gain and power-added efficiency of 4.3 dB and 38 percent, respectively, was obtained. The large-gate-width devices provided over twice the previously reported output power for InGaAs MISFETs at X-band. In addition, output power stability within 1.2 percent over 24 h of continuous operation was achieved. In addition, a drain current drift of 4 percent over 10,000 sec was obtained.

Johnson, Gregory A.↗

NASA NTRS1991

MMIC integration technology investigation

Final technical report on NASA cooperative agreement NCC-167 is presented for the period March 5, 1990 to June 15, 1991. The following topics are included: (1) four to one power combiner for 20 GHz phased array antenna using RADC MMIC phase shifters; and (2) testing of indium phosphide devices.

Kapoor, Vik J.↗

NASA NTRS1991

Submicron gate InP power MISFET's with improved output power density at 18 and 20 GHz

The microwave characteristics are presented at 18 and 20 GHz of submicron gate indium phosphide (InP) metal-insulator-semiconductor field-effect transistors (MISFET's) for high output power density applications. InP power MISFET's were fabricated and the output power density was investigated as a function of drain-source spacing. The best output power density and gain were obtained for drain-source spacing of 3 microns. The output power density is 2.7 times greater than was previously measured for InP MISFET's at 18 and 20 GHz, and the power-added efficiency also increased.

Biedenbender, M. D.↗

NASA NTRS1991

Plasma-deposited germanium nitride gate insulators for indium phosphide metal-insulator-semiconductor field-effect transistors

Plasma-deposited germanium nitride was investigated for the first time as a possible gate insulator for InP compound semiconductor metal-insulator-semiconductor FET (MISFET) technology. The germanium nitride films were successfully deposited in a capacitively coupled parallel plate reactor at 13.56 MHz operation using GeH4/N2/NH3 and GeH4/N2 mixtures as reactant gases. The former process produced better quality films with enhanced uniformity, increased deposition rates, and increased resistivity. The breakdown field strength of the films was greater than 10 to the 6th V/cm. Auger electron spectroscopy did not indicate significant chemical composition differences between the two processes. For MISFETs with 2-micron channel lengths fabricated on InP, the device transconductance and threshold voltage for the GeH4/N2/NH3 process were 17 mS/mm and -3.6 V, respectively. The drain-source breakdown voltages were greater than 10 V.

Johnson, Gregory A.↗

NASA NTRS1990

Electron beam induced damage in PECVD Si3N4 and SiO2 films on InP

Phosphorus rich plasma enhanced chemical vapor deposition (PECVD) of silicon nitride and silicon dioxide films on n-type indium phosphide (InP) substrates were exposed to electron beam irradiation in the 5 to 40 keV range for the purpose of characterizing the damage induced in the dielectic. The electron beam exposure was on the range of 10(exp -7) to 10(exp -3) C/sq cm. The damage to the devices was characterized by capacitance-voltage (C-V) measurements of the metal insulator semiconductor (MIS) capacitors. These results were compared to results obtained for radiation damage of thermal silicon dioxide on silicon (Si) MOS capacitors with similar exposures. The radiation induced damage in the PECVD silicon nitride films on InP was successfully annealed out in an hydrogen/nitrogen (H2/N2) ambient at 400 C for 15 min. The PECVD silicon dioxide films on InP had the least radiation damage, while the thermal silicon dioxide films on Si had the most radiation damage.

Pantic, Dragan M.↗

NASA NTRS1989

Ion-implanted high microwave power indium phosphide transistors

Encapsulated rapid thermal annealing (RTA) has been used in the fabrication of InP power MISFETs with ion-implanted source, drain, and active-channel regions. The MISFETs had a gate length of 1.4 microns. Six to ten gate fingers per device, with individual gate finger widths of 100 or 125 microns, were used to make MISFETs with total gate widths of 0.75, 0.8, or 1 mm. The source and drain contact regions and the channel region of the MISFETs were fabricated using Si implants in InP at energies from 60 to 360 keV with doses of (1-560) x 10 to the 12th/sq cm. The implants were activated using RTA at 700 C for 30 sec in N2 or H2 ambients using an Si3N4 encapsulant. The high-power high-efficiency MISFETs were characterized at 9.7 GHz, and the output microwave power density for the RTA conditions used was as high as 2.4 W/mm. For a 1-W input at 9.7 GHz gains up to 3.7 dB were observed, with an associated power-added efficiency of 29 percent and output power density 70 percent greater than that of GaAs MESFETs.

Biedenbender, Michael D.↗

NASA NTRS1987

Rapid thermal annealing of indium phosphide compound semiconductors

The rapid thermal annealing (RTA) of indium phosphide (InP) substrates using a proximity contact method and silicon nitride encapsulation is investigated. The surface conditions of the InP substrates following cleaning with procedures A and B are analyzed. Procedure A involves using an iodic acid solution to remove work-damage InP surface layers and B is a degasssing process and hydrofluoric acid solution for native oxide removal. AES, XPS, and SIMS data of the proximity contact and silicon nitride encapsulated annealed samples are examined. The data reveal that RTA using proximity contact with silicon wafers does not provide adequate protection; however, the InP sample is successfully annealed when protected by a silicon nitride encapsulant.

Biedenbender, Michael D.↗