Engineering topics

Kao, Y. C.

Publications and source records attributed to Kao, Y. C..

6 records

NASA NTRS1991

A high efficiency Ka-band monolithic pseudomorphic HEMT amplifier

A monolithic three-stage Ka-band amplifier has been designed and fabricated on a doped channel heterostructure. Devices with gate length of 0.2 micron and gate width of 50, 100, and 250 micron were cascaded. The gate and drain bias networks were also integrated. The small signal gain is 31 dB and the amplifier is capable of an output power of 190 mW with 23 dB gain and 30.2 percent power added efficiency at 31 GHz. This is a record efficiency for a multistage MMIC at this frequency.

Saunier, Paul↗

NASA NTRS1989

Doped-channel heterojunction structures for millimeter-wave discrete devices and MMICs

AlGaAs/InGaAs/GaAs-type heterostructures with one or two channels have been used to fabricate both discrete devices and monolithic amplifiers for millimeter-wave operation. The authors report that 0.25-micron x 50-micron discrete devices delivered a power density of 1 W/mm with 2.9-dB gain and 25 percent efficiency at 60 GHz. A 100-micron monolithic single-stage amplifier demonstrated a record 40 percent efficiency at 32 GHz, and a two-stage monolithic amplifier achieved a record 31.3 percent efficiency with 72-mW power and 13-dB gain at 32 GHz.

Saunier, P.↗

NASA NTRS1988

Studies of molecular-beam epitaxy growth of GaAs on porous Si substrates

GaAs has been grown on porous Si directly and on Si buffer layer-porous Si substrates by molecular-beam epitaxy. In the case of GaAs growth on porous Si, transmission electron microscopy (TEM) reveals that the dominant defects in GaAs layers grown on porous Si are microtwins and stacking faults, which originate from the GaAs/porous Si interface. GaAs is found to penetrate into the porous Si layers. By using a thin Si buffer layer (50 nm), GaAs penetration diminishes and the density of microtwins and stacking faults is largely reduced and localized at the GaAs/Si buffer interface. However, there is a high density of threading dislocations remaining. Both Si (100) aligned and four degree tilted substrates have been examined in this study. TEM results show no observable effect of the tilted substrates on the quality of the GaAs epitaxial layer.

Mii, Y. J.↗

NASA NTRS1987

Growth and characterization of molecular beam epitaxial GaAs layers on porous silicon

GaAs layers have been grown on porous silicon (PS) substrates with good crystallinity by molecular beam epitaxy. In spite of the surface irregularity of PS substrates, no surface morphology deterioration was observed on epitaxial GaAs overlayers. A 10-percent Rutherford backscattering spectroscopy minimum channeling yield for GaAs-on-PS layers as compared to 16 percent for GaAs-on-Si layers grown under the same condition indicates a possible improvement of crystallinity when GaAs is grown on PS. Transmission electron microscopy reveals that the dominant defects in the GaAs-on-PS layers are microtwins and stacking faults, which originate from the GaAs/PS interface. GaAs is found to penetrate into the PS layers. n-type GaAs/p-type PS heterojunction diodes were fabricated with good rectifying characteristics.

Lin, T. L.↗

NASA NTRS1983

High Power Switching Transistor

Improved switching transistors handle 400-A peak currents and up to 1,200 V. Using large diameter silicon wafers with twice effective area as D60T, form basis for D7 family of power switching transistors. Package includes npn wafer, emitter preform, and base-contact insert. Applications are: 25to 50-kilowatt high-frequency dc/dc inverters, VSCF converters, and motor controllers for electrical vehicles.

Hower, P. L.↗

NASA NTRS1972

High voltage and current, gate assisted, turn-off thyristor development

An improved high speed power switch with unique turn-off capability was developed. This gate assisted turn-off thyristor (GATT) was rated 1000 volts and 100 amperes with turn-off times of 2 microseconds. Fifty units were delivered for evaluation. In addition, test circuits designed to relate to the series inverter application were built and demonstrated. In the course of this work it was determined that the basic device design is adequate to meet the static characteristics and dynamic turn-off specification. It was further determined that the turn-on specification is critically dependent on the gate drive circuit due to the distributive nature of the cathode-gate geometry. Future work should emphasize design modifications which reduce the gate current required for fast turn-on, thereby opening the way to higher power (current) devices.

Nowalk, T. P.↗