Engineering topics

Inukai, Thomas

Publications and source records attributed to Inukai, Thomas.

8 records

NASA NTRS1995

Information Switching Processor (ISP) contention analysis and control

In designing a satellite system with on-board processing, the selection of a switching architecture is often critical. The on-board switching function can be implemented by circuit switching or packet switching. Destination-directed packet switching has several attractive features, such as self-routing without on-board switch reconfiguration, no switch control memory requirement, efficient bandwidth utilization for packet switched traffic, and accommodation of circuit switched traffic. Destination-directed packet switching, however, has two potential concerns: (1) contention and (2) congestion. And this report specifically deals with the first problem. It includes a description and analysis of various self-routing switch structures, the nature of contention problems, and contention and resolution techniques.

Inukai, Thomas↗

NASA NTRS1994

Modulation and synchronization technique for MF-TDMA system

This report addresses modulation and synchronization techniques for a multi-frequency time division multiple access (MF-TDMA) system with onboard baseband processing. The types of synchronization techniques analyzed are asynchronous (conventional) TDMA, preambleless asynchronous TDMA, bit synchronous timing with a preamble, and preambleless bit synchronous timing. Among these alternatives, preambleless bit synchronous timing simplifies onboard multicarrier demultiplexer/demodulator designs (about 2:1 reduction in mass and power), requires smaller onboard buffers (10:1 to approximately 3:1 reduction in size), and provides better frame efficiency as well as lower onboard processing delay. Analysis and computer simulation illustrate that this technique can support a bit rate of up to 10 Mbit/s (or higher) with proper selection of design parameters. High bit rate transmission may require Doppler compensation and multiple phase error measurements. The recommended modulation technique for bit synchronous timing is coherent QPSK with differential encoding for the uplink and coherent QPSK for the downlink.

Faris, Faris↗

NASA NTRS1993

On-board B-ISDN fast packet switching architectures. Phase 1: Study

The broadband integrate services digital network (B-ISDN) is an emerging telecommunications technology that will meet most of the telecommunications networking needs in the mid-1990's to early next century. The satellite-based system is well positioned for providing B-ISDN service with its inherent capabilities of point-to-multipoint and broadcast transmission, virtually unlimited connectivity between any two points within a beam coverage, short deployment time of communications facility, flexible and dynamic reallocation of space segment capacity, and distance insensitive cost. On-board processing satellites, particularly in a multiple spot beam environment, will provide enhanced connectivity, better performance, optimized access and transmission link design, and lower user service cost. The following are described: the user and network aspects of broadband services; the current development status in broadband services; various satellite network architectures including system design issues; and various fast packet switch architectures and their detail designs.

Faris, Faris↗

NASA NTRS1993

On-board B-ISDN fast packet switching architectures. Phase 1: Study

Broadband ISDN (B-ISDN) extends the service integration concept to include future high speed, high volume network services as well as to accommodate narrowband ISDN in its infrastructure. The impact of B-ISDN services on satellite communications can be significant, requiring the same or similar quality of communications services provided by the terrestrial B-ISDN network. Potential satellite applications, alternate satellite network architectures, system design issues, and onboard switching/processing options for satellite B-ISDN services are investigated. Special attention is focused on fast packet switching architectures and switch design details to exploit the feasibility of implementing a fast packet switch in the future advanced communications satellite.

Faris, Faris↗

NASA NTRS1992

On-board processing satellite network architectures for broadband ISDN

Onboard baseband processing architectures for future satellite broadband integrated services digital networks (B-ISDN's) are addressed. To assess the feasibility of implementing satellite B-ISDN services, critical design issues, such as B-ISDN traffic characteristics, transmission link design, and a trade-off between onboard circuit and fast packet switching, are analyzed. Examples of the two types of switching mechanisms and potential onboard network control functions are presented. A sample network architecture is also included to illustrate a potential onboard processing system.

Inukai, Thomas↗

NASA NTRS1991

On-board processing architectures for satellite B-ISDN services

Inukai, Thomas↗

NASA NTRS1991

Satellite B-ISDN traffic analysis

The impact of asynchronous transfer mode (ATM) traffic on the advanced satellite broadband integrated services digital network (B-ISDN) with onboard processing is reported. Simulation models were built to analyze the cell transfer performance through the statistical multiplexer at the earth station and the fast packet switch at the satellite. The effectiveness of ground ATM cell preprocessing was established, as well as the performance of several schemes for improving the down-link beam utilization when the space segment employs a fast packet switch.

Shyy, Dong-Jye↗

NASA NTRS1991

COMSAT Laboratories' on-board baseband switch development

Work performed at COMSAT Laboratories to develop a prototype on-board baseband switch is summarized. The switch design is modular to accommodate different service types, and the architecture features a high-speed optical ring operating at 1 Gbit/s to route input (up-link) channels to output (down-link) channels. The switch is inherently a packet switch, but can process either circuit-switched or packet-switched traffic. If the traffic arrives at the satellite in a circuit-switched mode, the input processor packetizes it and passes it on to the switch. The main advantage of the packet approach lies in its simplified control structure. Details of the switch architecture and design, and the status of its implementation, are presented.

Pontano, B. A.↗