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Galigekere, Veda Prakash

Publications and source records attributed to Galigekere, Veda Prakash.

Balancing Charging Station Utilization and Throughput in Electric Vehicle Charging Stations with Queuing Theory

The rapid increase in electric vehicle (EV) adoption demands enhancements in the efficiency and adaptability of EV supply equipment (EVSE). Traditional EVSE systems often fail to optimize power delivery to meet the variable acceptance rates of EV batteries, resulting in significant energy wastage and reduced operational efficiency. This research addresses these challenges by integrating queuing theory with modular EVSE architectures, offering a dual strategy to optimize the operation of EV charging stations. A simulation model was developed to assess various configurations of charger capacities and outlet numbers. This model aimed to identify the optimal setup that maximizes station utilization while minimizing charging times and maximizing throughput. The model focused on charger capacities ranging from 50 to 250 kW and analyzed the different capacities’ effects on charging times and the number of vehicles served. The results indicate that a charger capacity of 125 kW is optimal, striking a balance between the charging time and the number of EVs served per hour, thus achieving the highest station utilization rate. This capacity allows for servicing a significant number of EVs with moderate increases in charging times. Lower capacities, although capable of serving more vehicles, lead to longer charging times and decreased throughput efficiency. The study underscores the effectiveness of combining queuing theory with flexible, modular charging systems that can dynamically adjust to EV charging demands.

Kumar, Praveen↗

Stacked-Die SiC Half-Bridge Module with Minimum Loop Inductance

Minimizing parasitic inductance of power modules is needed to advance their electrical performance. Innovation in the past decade has driven down the inductance of SiC half-bridge power modules to around 1–2 nH by using multilayer, embedded, and hybrid structures. Further reduction becomes difficult, mainly limited by the excessive interconnects required for the planar placement of vertical conducting chips. To address this, a vertically stacked-die approach is proposed in this paper, taking advantage of the vertical conducting nature of the SiC chips. With ceramic decoupling capacitors integrated, 0.48 nH overall loop inductance is achieved and validated by experimental measurement. This paper also discusses potential approaches to further reduce the inductance.

Ribeiro, Pedro↗

Wireless power system

A method for wirelessly or conductively (non-wireless) providing AC or DC power in AC or DC load applications and bidirectional applications.

Asa, Erdem↗

Predictive Control to Further Reduce DC-Link Capacitor Current Stress for Segmented Inverter

Two three-phase interleaved inverters have been used in traction drive applications to reduce the current stress in a DC link capacitor bank. In such applications, either carrier-based or space vector modulation is used to select the optimum switching sequences, and the results show 50% less capacitor current than that of a single three-phase inverter. The switching state selection process for this inverter is tedious, and there has been no research to find the optimal switching state. To overcome this challenge, this research employed a simple finite set model predictive control to select the optimum switching sequence for a dual three-phase interleaved topology, called a segmented inverter. The results show that the predictive control algorithm can provide a simple solution and can reduce the current stress by 27% compared with traditional modulation techniques for the segmented inverters.

Ribeiro, Pedro↗