Engineering Papers⌕ Search

Engineering topics

Doolittle, Lawrence

Publications and source records attributed to Doolittle, Lawrence.

At least 19 records

Generic Multi-Layer Perceptron Inference Accelerator on FPGA (vneuron) v1.0

We have designed and implemented a neural network inference compute engine (vneuron) that can be deployed in the fabric of any FPGA without using special hardware accelerator primitive. The "vneuron" is purely written in verilog, and supports scalable neural network structure with fully connected layers and ReLU activation ( Multi-Layer Perceptron architecture) with 16 bits of precision. We have demonstrated it on an Xilinx Artix 7 FPGA for a 16-input, 8-output MLP with 3 layer, 1600 parameters. It takes 40 DSP48E and 40 BRAM18, and takes 131 clock cycles for computing (1048 ns when clocked at 125MHz). We include PyTorch quantization from a given floating point model, and provide behavioral verification simulation in the disclosed software package.

Du, Qiang↗

USPAS Digital Low-Level RF firmware and software suite (uspas_llrf) v1.0

The USPAS Digital Low-Level RF firmware and software suite was originally developed for the USPAS 2023 LLRF course, for demonstrating the close loop RF control on the BerkeleyLab Marble FPGA carrier and Zest digitizer platform in controlling the RF field for various accelerators. The suite features Register-transfer level (RTL) designs for the board-support layer, digital signal processing and verification test benches, system-on-chip architecture, and Experimental Physics and Industrial Control System (EPICS) support, utilizing a open-source tool chain.

Du, Qiang↗

LCLS-II and HE Cryomodule Microphonics at CMTF at Fermilab

Microphonics causes the cavity to detune. This study discusses the microphonics of 16 cryomodules, 14 for LCLS-II and 2 for LCLS-II HE tested at CMTF. The peak detuning, as well as the RMS detuning for each cryomodule, will be discussed. For each cryomodule, the data was taken with enough soaking time to prevent any thermalization effects which can show up in the detuning. Each data capture taken was 30 minutes or longer and sampled at 1 kHz.

43 PARTICLE ACCELERATORS↗

LCLS-II-HE Cryomodule Testing at Fermilab

22 Linac Coherent Light Source II (LCLS-II) cryomodules were successfully tested at the Cryomodule Test Facility (CMTF) at Fermilab. Following the completion of the LCLS-II testing program, CMTF has shifted to testing cryomodules for the LCLS-II High Energy upgrade (LCLS-II-HE). The first LCLS-II-HE cryomodule, the verification cryomodule (vCM), was successfully tested and verified the readiness of LCLS-II-HE cryomodule testing at CMTF, and production cryomodule testing has begun. Presented here are the production cryomodule test acceptance criteria, testing plan, and cryomodule test results so far.

43 PARTICLE ACCELERATORS↗

Resonance Control System for the PIP-II IT HWR Cryomodule

The HWR (half-wave-resonator) cryomodule is the first one in the superconducting section of the PIP-II LINAC project at Fermilab. PIP-II IT is a test facility for the project where the injector, warm front-end, and the first two superconducting cryomodules are being tested. The HWR cryomodule comprises 8 cavities operating at a frequency of 162.5 MHz and accelerating beam up to 10 MeV. Resonance control of the cavities is performed with a pneumatically operated slow tuner which compresses the cavity at the beam ports. Helium gas pressure in a bellows mounted to an end wall of the cavity is controlled by two solenoid valves, one on the pressure side and one on the vacuum side. The resonant frequency of the cavity can be controlled in one of two modes. A pressure feedback control loop can hold the cavity tuner pressure at a fixed value for the desired resonant frequency. Alternately, the feedback loop can regulate the cavity tuner pressure to bring the RF detuning error to zero. The resonance controller is integrated into the LLRF control system for the cryomodule. The control system design and performance of the resonance control system are described in this paper.

43 PARTICLE ACCELERATORS↗

Performance of the LLRF System for the Fermilab PIP-II Injector Test

PIP-II IT is a test facility for the PIP-II project where the injector, warm front-end, and the first two superconducting cryomodules are being tested. The 8-cavity half-wave-resonator (HWR) cryomodule operating at 162.5 MHz is followed by the 8-cavity single-spoke resonator(SSR1) cryomodule operating at 325 MHz. The LLRF systems for both cryomodules are based on a common SOC FPGA-based hardware platform. The resonance control systems for the two cryomodules are quite different, the first being a pneumatic system based on helium pressure and the latter a piezo/stepper motor type control. The data acquisition and control system can support both CW and Pulsed mode operations. Beam loading compensation is available which can be used for both manual/automatic control in the LLRF system. The user interfaces include EPICS, Labview, and ACNET. Testing of the RF system has progressed to the point of being ready for a 2 mA beam to be accelerated to 25 MeV. The design and performance of the field control and resonance control system operation with beam are presented in this paper.

43 PARTICLE ACCELERATORS↗

Marble v1.0

The IP is a schematic of Marble, a dual low pin count FPGA Mezanine Card (LPC-FMC) carrier based on an Artix-7 in a FG484 package.

Doolittle, Lawrence↗

Bedrock v1.0

Bedrock is a code set of firmware libraries written in Verilog used by LBNL for accelerator controls and other applications. A set of commonly used building blocks in DSP (Digital Signal Processing) are present such as a CORDIC implementation, CIC filters, etc. Other useful functions include an in-fabric Ethernet core implementation to communicate with FPGAs over the network and support drivers for components such as ADCs and DACs we have used in our designs. The code base is intended to serve as a support library for HDL designs.

Doolittle, Lawrence↗

Zest v1.0

Explore the source record for details and available documents.

Doolittle, Lawrence↗

Active Microphonics Compensation for LCLS-II

Testing of early LCLS-II cryomodules showed microphonics-induced detuning levels well above specification. As part of a risk-mitigation effort, a collaboration was formed between SLAC, LBNL, and Fermilab to develop and implement active microphonics compensation into the LCLS-II LLRF system. Compensation was first demonstrated using a Fermilab FPGA-based development system compensating on single cavities, then with the LCLS-II LLRF system on single and multiple cavities simultaneously. The primary technique used for this effort is a bank of narrowband filter set using the piezo-to-detuning transfer function. Compensation automation, optimization, and stability studies were done. Details of the techniques used, firmware/software implementation, and results of these studies will be presented.

43 PARTICLE ACCELERATORS↗

High-precision phase detection in femtosecond timing and synchronization system for TXGLS

High-precision phase detection is critical to the timing and synchronization system for particle accelerators. A live calibration signal is introduced to femtosecond-level phase detection in order to measure the relative phase jitter between a reference wave and a radio frequency (RF) signal, and compensate for the cable electrical length drift due to the thermal variation effect. Non-IQ sampling and 2-stage cascaded integrator-comb filters are integrated into the field-programmable gate array-based digital signal processing to reduce spectrum aliasing and suppress noise. Fine adjustment of hardware components has been made to ensure the isolation between different signals and the linearity over the full-range power level. Lastly, we have achieved a 6.3 fs root mean square timing jitter for a 2856 MHz RF signal in a single channel, compared to the theoretical limit of 5.1 fs for the current hardware component.

43 PARTICLE ACCELERATORS↗

Extracting cavity and pulse phases from limited data for coherent pulse stacking

Coherent pulse stacking (CPS) is a new time-domain coherent addition technique that stacks several optical pulses into a single output pulse, enabling high pulse energy and high average power. A Z-domain model targeting the pulsed laser is assembled to describe the optical interference process. In this study, an algorithm, extracting the cavity phase and pulse phases from limited data, where only the pulse intensity is available, is developed to diagnose optical cavity resonators. We also implement the algorithm on the cascaded system of multiple optical cavities, achieving phase errors less than 1.0°(root mean square), which could ensure the stability of CPS.

42 ENGINEERING↗

Design and Implementation of the LLRF System for LCLS-II

The SLAC National Accelerator Laboratory is building LCLS-II, a new 4 GeV CW superconducting (SCRF) linac as a major upgrade of the existing LCLS. The SCRF linac consists of 35 ILC style cryomodules (eight cavities each) for a total of 280 cavities. Expected cavity gradients are 16 MV/m with a loaded QL of ~ 4 x 10⁷. Each individual RF cavity will be powered by one 3.8 kW solid state amplifier. To ensure optimum field stability a single source single cavity control system has been chosen. It consists of a precision four channel cavity receiver and two RF stations (Forward, Reflected and Drive signals) each controlling two cavities. In order to regulate the resonant frequency variations of the cavities due to He pressure, the tuning of each cavity is controlled by a Piezo actuator and a slow stepper motor. In addition the system (LLRF-amplifier-cavity) was modeled and cavity microphonic testing has started. This paper will describe the main system elements as well as test results on LCLS-II cryomodules.

Serrano, Carlos↗

High Precision RF Control for SRF Cavities in LCLS-II

The unique properties of SRF cavities enable a new generation of X-ray light sources in XFEL and LCLS-II. The LCLS-II design calls for 280 L-band cavities to be operated in CW mode with a Q_{L} of 4x10⁷, using Single-Source Single-Cavity control. The target RF field stability is 0.01% and 0.01 degree for the band above 1 Hz. Hardware and software implementing a digital LLRF system has been constructed by a four-lab collaboration to minimize known contributors to cavity RF field fluctuation. Efforts include careful attachment to the phase reference line, and minimizing the effects of RF crosstalk by placing forward and reverse signals in chassis separate from the cavity measurement. A low-noise receiver/digitizer section will allow feedback to operate with high proportional gain without excessive noise being sent to the drive amplifier. Test results will show behavior on prototype cryomodules at FNAL and JLab, ahead of the 2018 final accelerator installation.

43 PARTICLE ACCELERATORS↗

FPGA-Based Optical Cavity Phase Stabilization for Coherent Pulse Stacking

Coherent pulse stacking (CPS) is a new time-domain coherent addition technique that stacks several optical pulses into a single output pulse, enabling high pulse energy from fiber lasers. We develop a robust, scalable, and distributed digital control system with firmware and software integration for algorithms, to support the CPS application. We model CPS as a digital filter in the Z domain and implement a pulse-pattern-based cavity phase detection algorithm on an field-programmable gate array (FPGA). A two-stage (2+1 cavities) 15-pulse stacking system achieves an 11.0 peak-power enhancement factor. Each optical cavity is fed back at 1.5kHz, and stabilized at an individually-prescribed round-trip phase with 0.7deg and 2.1deg rms phase errors for Stages 1 and 2, respectively. Optical cavity phase control with nanometer accuracy ensures 1.2% intensity stability of the stacked pulse over 12 h. The FPGA-based feedback control system can be scaled to large numbers of optical cavities.

43 PARTICLE ACCELERATORS↗

ADC evaluation boards design and test framework for LCLS-II precision receiver

In the low-level RF control field, ADC acquisition accuracy and noise set the boundary of our control ability, making it important to develop low-noise acquisition systems. From the design to test stage, all the noise terms should be understood and characterized. The specific need addressed here is the precision acquisition system for the second Linac Coherent Light Source (LCLS-II), led by SLAC National Accelerator Laboratory. Test circuit boards for the LTC2174 and AD9268 ADCs are designed and fabricated by LBNL. An ADC test framework based on FPGA evaluation board to assess performance has been developed. The ADC test framework includes both DSP (Digital Signal Processing) firmware and processing software. It is useful for low-level RF control and other synchronization projects. Investigating the clock jitter between two channels give us an understanding of that noise source. Working with the test framework, the raw ADC data are transferred to a computer through a Gigabit Ethernet interface. Then short-term error signal can be calculated based on a sine wave fit. By changing low-pass filter bandwidth, relative long-term performance can also be obtained. Amplitude jitter and differential phase jitter are the key issues for ADCs. This paper will report the test results for LTC2174 and AD9268 chips. The integral amplitude jitter is smaller than 0.003 %, and the integral phase noise is smaller than 0.0015° (measured at 47 MHz RF, 100 MHz clock, bandwidth 1 Hz to 100 kHz) for both ADC chips.

46 INSTRUMENTATION RELATED TO NUCLEAR SCIENCE AND ↗

LLRF Control of High Loaded-Q Cavities for the LCLS-II

The SLAC National Accelerator Laboratory is planning an upgrade (LCLS-II) to the Linear Coherent Light Source with a 4 GeV CW Superconducting Radio Frequency (SCRF) linac. The nature of the machine places stringent requirements in the Low-Level RF (LLRF) system, expected to control the cavity fields within 0.01 degrees in phase and 0.01% in amplitude, which is equivalent to a longitudinal motion of the cavity structure in the nanometer range. This stability has been achieved in the past but never for hundreds of superconducting cavities in Continuous-Wave (CW) operation. The difficulty resides in providing the ability to reject disturbances from the cryomodule, which is incompletely known as it depends on the cryomodule structure itself (currently under development at JLab and Fermilab) and the harsh accelerator environment. Previous experience in the field and an extrapolation to the cavity design parameters (relatively high Q_{L}c≈ 4×10⁷ , implying a half-bandwidth of around 16 Hz) suggest the use of strong RF feedback to reject the projected noise disturbances, which in turn demands careful engineering of the entire system.

43 PARTICLE ACCELERATORS↗