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Dong, Dong

Publications and source records attributed to Dong, Dong.

Double-Side Cooled 1.2kV, 300A SiC MOSFET Phase-leg Modules for 200 kW, > 100 kW/L Traction Inverters

The packaging of a double-side cooled 1.2 kV, 149 A SiC phase-leg modules has been reported in recent years for making 100 kW, 100 kW/L traction inverters. Each phase-leg module consists of two SiC MOSFETs, one per switch position. Six of the phase-leg modules are assembled into a segmented inverter configuration to meet the power and power density requirement. In this work, the layout of the phase-leg module was redesigned to include four of the SiC MOSFETs, two per switch position, with the aim of doubling the power to 200 kW and increasing the power density beyond 100 kW/L, but with only a 10.25% footprint increase. Key features of the packaging technology developed in the previous work were implemented in the current work, which include silver sintering for chip bonding and porous silver inter-posts for bonding device source pads to substrate. Parasitic extraction simulation showed that the four-chip module has a low parasitic inductance of 4.7 nH, like the two-chip module. Static characterization of the four-chip prototypes showed a low average on-resistance of 9 mΩ and a low average leakage current of 5 nA at Vds of 1.2 kV.

Zhang, Zichen↗

A 75 kVA Intelligent Power Stages (IPS) Unit Design for Future Grid-interface Application

The demand for grid-interface converter with flexible dc bus is driven by the fast development of energy storage system (ESS), electric vehicle (EV) charging system, and versatile residential load. This paper first proposes a two-stage intelligent power stage (IPS) unit for future grid-interface applications. To achieve zero common-mode (CM) voltage emissions, step-up and step-down voltage gain, a 3-level four-switch buck-boost (3-L FSBB) dc-dc converter is adopted with fully zero voltage switching (ZVS). In one IPS unit, an advanced fiberoptic communication with sub-nanosecond synchronization is developed for different enhanced gate drivers. Moreover, an enhanced gate driver integrated current and voltage sensors is designed for monitoring and diagnostics. To achieve a whole low-profile design, three 12 oz heavy copper planar ac inductors are designed and implemented. Finally, a 75 kVA IPS unit was built to verify both the thermal and electrical design.

Cao, Yuliang↗

3.5 kW/in3 Planar Coupled Inductor Design and Optimization for a 50 kW 3-level Four-Switch Buck-Boost (3L-FSBB) Converter

Planar magnetics design has been widely used in power electronics field because of the low profile, ease of manufacturability, and high power density. This paper first proposes a 3-level four-switch buck-boost (3L-FSBB) converter for the dc-dc applications where the zero common-mode (CM) voltage emissions, step-up and step-down are all required. With the consideration of power density, efficiency, and cost, a 15oz heavy copper coupled inductor for 3-level FSBB converter was designed and optimized with the low-cost commercial core and planar windings. According to the soft-switching quadrangle modulation for 3-L FSBB, the turns number and stacked core number are optimized first. And then, a two-board design is proposed to reduce the fringing effect and improve the thermal performance. Finally, a 75 kVA two-stage ac-dc-dc converter including a 3-level FSBB converter was built to verify the electrical design.

Cao, Yuliang↗

Medium voltage planar DC bus distributed capacitor array

An inverter with a modular bus assembly is described. In various embodiments, the modular bus assembly includes a laminated motherboard and a plurality of capacitor daughtercards. The laminated motherboard can be configured to interface a plurality of phase-leg modules and a plurality of capacitor daughtercards through a plurality of terminals and connectors located on a bottom side or a top side of the laminated motherboard. The laminated motherboard includes a layer stack with a plurality of conductor layers. Each of the plurality of conductor layers is implemented with a net spacing from a neighboring plated through hole (PTH) based at least in part on differences in potential to be applied to each of the plurality of conductor layers as compared to a potential to be applied to the PTH. Embedded shield polygons can be implemented on the laminated motherboard to mitigate surface discharge at surface terminal (PTH/SMT) triple junctions.

Ravi, Lakshmi↗

A Single Passive Gate-Driver for Series Connected Power Devices in DC Circuit Breaker Applications

This letter proposes a novel single passive gate driver solution based on passive devices to control series-connected power semiconductor devices for dc circuit breaker (DCCB) applications. The transient suppression devices (e.g., metal oxide varistors) are utilized to achieve natural voltage balancing among the series devices, while providing the discharge path of the gate capacitor of the upper devices. Here, the proposed method is very simple, cost effective and more compact compared with conventional voltage balancing method-based DCCBs. Besides, gate voltage oscillation during the voltage recovery process is mitigated by the addition of an extra gate capacitor. Simulation and experimental results are provided to verify the effectiveness of proposed method.

24 POWER TRANSMISSION AND DISTRIBUTION↗