Engineering topics

Dasu, Aravind

Publications and source records attributed to Dasu, Aravind.

3 records

DOE OSTI2014

Systems and methods for sensing occupancy

A computer implemented method for sensing occupancy of a workspace includes creating a difference image that represents luminance differences of pixels in past and current images of the workspace resulting from motion in the workspace, determining motion occurring in regions of the workspace based on the difference image, and altering a workspace environment based at least in part on the determined motion. The method also includes determining which pixels in the difference image represent persistent motion that can be ignored and determining which pixels representing motion in the difference image are invalid because the pixels are isolated from other pixels representing motion.

97 MATHEMATICS AND COMPUTING↗

NASA NTRS2014

Dynamically Reconfigurable Systolic Array Accelorators

A polymorphic systolic array framework that works in conjunction with an embedded microprocessor on an FPGA, that allows for dynamic and complimentary scaling of acceleration levels of two algorithms active concurrently on the FPGA. Use is made of systolic arrays and hardware-software co-design to obtain an efficient multi-application acceleration system. The flexible and simple framework allows hosting of a broader range of algorithms and extendable to more complex applications in the area of aerospace embedded systems.

Dasu, Aravind↗

NASA NTRS2012

Dynamically Reconfigurable Systolic Array Accelerator

A polymorphic systolic array framework has been developed that works in conjunction with an embedded microprocessor on a field-programmable gate array (FPGA), which allows for dynamic and complimentary scaling of acceleration levels of two algorithms active concurrently on the FPGA. Use is made of systolic arrays and a hardware-software co-design to obtain an efficient multi-application acceleration system. The flexible and simple framework allows hosting of a broader range of algorithms, and is extendable to more complex applications in the area of aerospace embedded systems. FPGA chips can be responsive to realtime demands for changing applications needs, but only if the electronic fabric can respond fast enough. This systolic array framework allows for rapid partial and dynamic reconfiguration of the chip in response to the real-time needs of scalability, and adaptability of executables.

Dasu, Aravind↗