A Model-Driven Approach to Warp/Thread-Block Level GPU Cache Bypassing
Explore the source record for details and available documents.
Dai, Hongwen↗
Engineering topics
Publications and source records attributed to Dai, Hongwen.
Explore the source record for details and available documents.
This paper presents novel cache optimizations for massively parallel, throughput-oriented architectures like GPUs. Based on the reuse characteristics of GPU workloads, we propose a design that integrates such efficient locality filtering capability into the decoupled tag store of the existing L1 D-cache through simple and cost-effective hardware extensions.