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Brambora, Clifford

Publications and source records attributed to Brambora, Clifford.

High-Rate Digital Receiver Board

A high-rate digital receiver (HRDR) implemented as a peripheral component interface (PCI) board has been developed as a prototype of compact, general-purpose, inexpensive, potentially mass-producible data-acquisition interfaces between telemetry systems and personal computers. The installation of this board in a personal computer together with an analog preprocessor enables the computer to function as a versatile, highrate telemetry-data-acquisition and demodulator system. The prototype HRDR PCI board can handle data at rates as high as 600 megabits per second, in a variety of telemetry formats, transmitted by diverse phase-modulation schemes that include binary phase-shift keying and various forms of quadrature phaseshift keying. Costing less than $25,000 (as of year 2003), the prototype HRDR PCI board supplants multiple racks of older equipment that, when new, cost over $500,000. Just as the development of standard network-interface chips has contributed to the proliferation of networked computers, it is anticipated that the development of standard chips based on the HRDR could contribute to reductions in size and cost and increases in performance of telemetry systems.

Ghuman, Parminder↗

Lessons from Adaptive Level One Accelerator (ALOA) System Implementation

The Adaptive Level One Accelerator (ALOA) system was developed as part of the Earth Science Data and Information System (ESDIS) project. The reconfigurable computing technologies were investigated for Level 1 satellite telemetry data processing to achieve computing acceleration and cost reduction for the next-generation Level 1 data processing systems. The MODIS instrument calibration algorithm was implemented using reconfigurable a computer. The system development process and the lessons learned throughout the design cycle are summarized in this paper.

Patel, Umesh D.↗