Engineering topics
Bolotin, Gary
Publications and source records attributed to Bolotin, Gary.
The Use of Redundancy to Improve Reliability of Deep Space Missions Using Stirling Radioisotope Generator Power Sources
This study will look at the 140 We class generator as originally envisioned for the ASRG and a larger generator that is scaled up to use four times the fuel. The results discussed below quantify the effect of the use of smaller generators and indicates that a scheme that makes use of several smaller generators enhances the system reliability and allows for more graceful degradation.
Towards a Unified, Scalable, and Highly Capable Next Generation Avionics Interconnect: The NEXUS Approach
No abstract available
Multiple Embedded Processors for Fault-Tolerant Computing
A fault-tolerant computer architecture has been conceived in an effort to reduce vulnerability to single-event upsets (spurious bit flips caused by impingement of energetic ionizing particles or photons). As in some prior fault-tolerant architectures, the redundancy needed for fault tolerance is obtained by use of multiple processors in one computer. Unlike prior architectures, the multiple processors are embedded in a single field-programmable gate array (FPGA). What makes this new approach practical is the recent commercial availability of FPGAs that are capable of having multiple embedded processors. A working prototype (see figure) consists of two embedded IBM PowerPC 405 processor cores and a comparator built on a Xilinx Virtex-II Pro FPGA. This relatively simple instantiation of the architecture implements an error-detection scheme. A planned future version, incorporating four processors and two comparators, would correct some errors in addition to detecting them.
Advanced mobility avionics : a reconfigurable mirco-avionics platform for the future needs of small planetary rovers and micospacecraft
Future small and micro-missions, such as Mars Scouts and Deep Space probes, require a new look at highly integrated, re-configurable, low power avionics. This paper will present our plans for developing a scalable, configurable, and highly integrated 32-bit embedded platform capable of implementing computationally intensive signal processing and control algorithms in space flight instruments and systems. This platform is designed to service the need of both small and large spacecraft and planetary rovers that will operate within moderate radiation environments. Some of the key characteristics of this platform are its small size, low power, high performance, and flexibility. This estimated 10 fold reduction in both size and power over state-of-the-art processing platforms will enable this new product to act as the core of a low-cost mobility system for a wide range of missions.
Operation of FPGAs at Extremely Low Temperatures
This paper describes the operation of FPGAs at very low temperatures eg -160(deg)C. Both Actel and Xilinx parts are tested It was found that low temperature operations is not a problem with the parts tested, but there is a problem with powering on an FPGA at cold temperatures.
An Adaptive Method for Reducing Clock Skew in an Accumulative Z-Axis Interconnect System
This paper will present several methods for adjusting clock skew variations that occur in a n accumulative z-axis interconnect system. In such a system, delay between modules in a function of their distance from one another. Clock distribution in a high-speed system, where clock skew must be kept to a minimum, becomes more challenging when module order is variable before design.
Space-Cube: A Flexible Computer Architecture Based on Stacked Modules
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