Engineering topics

Beheim, Glenn M.

Publications and source records attributed to Beheim, Glenn M..

At least 37 records · Page 2

NASA NTRS2015

Evidence of Processing Non-Idealities in 4H-SiC Integrated Circuits Fabricated with Two Levels of Metal Interconnect

The fabrication and prolonged 500 C electrical testing of 4H-SiC junction field effect transistor (JFET) integrated circuits (ICs) with two levels of metal interconnect is reported in another submission to this conference proceedings. While some circuits functioned more than 1000 hours at 500 C, the majority of packaged ICs from this wafer electrically failed after less than 200 hours of operation in the same test conditions. This work examines the root physical degradation and failure mechanisms believed responsible for observed large discrepancies in 500 C operating time. Evidence is presented for four distinct issues that significantly impacted 500 C IC operational yield and lifetime for this wafer.

Microelectronics↗

NASA NTRS2015

High Temperature Pt/Alumina Co-Fired System for 500 C Electronic Packaging Applications

Gold thick-film metallization and 96 alumina substrate based prototype packaging system developed for 500C SiC electronics and sensors is briefly reviewed, the needs of improvement are discussed. A high temperature co-fired alumina material system based packaging system composed of 32-pin chip-level package and printed circuit board is discussed for packaging 500C SiC electronics and sensors.

High temperature↗

NASA NTRS2014

Electrical Characterization of 4H-SiC JFET Wafer: DC Parameter Variations for Extreme Temperature IC Design

This work reports DC electrical characterization of a 76 mm diameter 4H-SiC JFET test wafer fabricated as part of NASA's on-going efforts to realize medium-scale ICs with prolonged and stable circuit operation at temperatures as high as 500 degC. In particular, these measurements provide quantitative parameter ranges for use in JFET IC design and simulation. Larger than expected parameter variations were observed both as a function of position across the wafer as well as a function of ambient testing temperature from 23 degC to 500 degC.

Microelectronics↗

NASA NTRS2014

Wireless Seismometer for Venus

Measuring the seismic activity of Venus is critical to understanding its composition and interior dynamics. Because Venus has an average surface temperature of 462 C and the challenge of providing cooling to multiple seismometers, a high temperature, wireless sensor using a wide bandgap semiconductor is an attractive option. This paper presents progress towards a seismometer sensor with wireless capabilities for Venus applications. A variation in inductance of a coil caused by a 1 cm movement of a ferrite probe held in the coil and attached to a balanced leaf-spring seismometer causes a variation of 80 MHz in the transmitted signal from the oscillator sensor system at 420 C, which correlates to a 10 kHz mm sensitivity when the ferrite probe is located at the optimum location in the coil.

seismometer↗

NASA NTRS2014

Wireless Capacitive Pressure Sensor Operating up to 400 Celcius from 0 to 100 psi Utilizing Power Scavenging

In this paper, a wireless capacitive pressure sensor developed for the health monitoring of aircraft engines has been demonstrated. The sensing system is composed of a Clapp-type oscillator that operates at 131 MHz. The Clapp oscillator is fabricated on a alumina substrate and consists of a Cree SiC (silicon carbide) MESFET (Metal Semiconductor Field Effect Transistors), this film inductor, Compex chip capacitors and Sporian Microsystem capacitive pressure sensor. The resonant tank circuit within the oscillator is made up of the pressure sensor and a spiral thin film inductor, which is used to magnetically couple the wireless pressure sensor signal to a coil antenna placed over 1 meter away. 75% of the power used to bias the sensing system is generated from thermoelectric power modules. The wireless pressure sensor is operational at room temperature through 400 C from 0 to 100 psi and exhibits a frequency shift of over 600 kHz.

Scardelletti, Maximilian C.↗

NASA NTRS2013

Packaging Technologies for High Temperature Electronics and Sensors

This paper reviews ceramic substrates and thick-film metallization based packaging technologies in development for 500 C silicon carbide (SiC) electronics and sensors. Prototype high temperature ceramic chip-level packages and printed circuit boards (PCBs) based on ceramic substrates of aluminum oxide (Al2O3) and aluminum nitride (AlN) have been designed and fabricated. These ceramic substrate-based chip-level packages with gold (Au) thick-film metallization have been electrically characterized at temperatures up to 550 C. A 96% alumina based edge connector for a PCB level subsystem interconnection has also been demonstrated recently. The 96% alumina packaging system composed of chip-level packages and PCBs has been tested with high temperature SiC devices at 500 C for over 10,000 hours. In addition to tests in a laboratory environment, a SiC JFET with a packaging system composed of a 96% alumina chip-level package and an alumina printed circuit board mounted on a data acquisition circuit board was launched as a part of the MISSE-7 suite to the International Space Station via a Shuttle mission. This packaged SiC transistor was successfully tested in orbit for eighteen months. A spark-plug type sensor package designed for high temperature SiC capacitive pressure sensors was developed. This sensor package combines the high temperature interconnection system with a commercial high temperature high pressure stainless steel seal gland (electrical feed-through). Test results of a packaged high temperature capacitive pressure sensor at 500 C are also discussed. In addition to the pressure sensor package, efforts for packaging high temperature SiC diode-based gas chemical sensors are in process.

Chen, Liang-Yu↗

NASA NTRS2013

Packaging Technologies for High Temperature Electronics and Sensors

This paper reviews ceramic substrates and thick-film metallization based packaging technologies in development for 500degC silicon carbide (SiC) electronics and sensors. Prototype high temperature ceramic chip-level packages and printed circuit boards (PCBs) based on ceramic substrates of aluminum oxide (Al2O3) and aluminum nitride (AlN) have been designed and fabricated. These ceramic substrate-based chiplevel packages with gold (Au) thick-film metallization have been electrically characterized at temperatures up to 550degC. A 96% alumina based edge connector for a PCB level subsystem interconnection has also been demonstrated recently. The 96% alumina packaging system composed of chip-level packages and PCBs has been tested with high temperature SiC devices at 500degC for over 10,000 hours. In addition to tests in a laboratory environment, a SiC JFET with a packaging system composed of a 96% alumina chip-level package and an alumina printed circuit board mounted on a data acquisition circuit board was launched as a part of the MISSE-7 suite to the International Space Station via a Shuttle mission. This packaged SiC transistor was successfully tested in orbit for eighteen months. A spark-plug type sensor package designed for high temperature SiC capacitive pressure sensors was developed. This sensor package combines the high temperature interconnection system with a commercial high temperature high pressure stainless steel seal gland (electrical feed-through). Test results of a packaged high temperature capacitive pressure sensor at 500degC are also discussed. In addition to the pressure sensor package, efforts for packaging high temperature SiC diode-based gas chemical sensors are in process.

Electronic packaging↗

NASA NTRS2012

High Temperature, Wireless Seismometer Sensor for Venus

Space agency mission plans state the need to measure the seismic activity on Venus. Because of the high temperature on Venus (462? C average surface temperature) and the difficulty in placing and wiring multiple sensors using robots, a high temperature, wireless sensor using a wide bandgap semiconductor is an attractive option. This paper presents the description and proof of concept measurements of a high temperature, wireless seismometer sensor for Venus. A variation in inductance of a coil caused by the movement of an aluminum probe held in the coil and attached to a balanced leaf-spring seismometer causes a variation of 700 Hz in the transmitted signal from the oscillator/sensor system at 426? C. This result indicates that the concept may be used on Venus.

Ponchak, George E.↗

NASA NTRS2011

High Temperature Capacitive Pressure Sensor Employing a SiC Based Ring Oscillator

In an effort to develop harsh environment electronic and sensor technologies for aircraft engine safety and monitoring, we have used capacitive-based pressure sensors to shift the frequency of a SiC-electronics-based oscillator to produce a pressure-indicating signal that can be readily transmitted, e.g. wirelessly, to a receiver located in a more benign environment. Our efforts target 500 C, a temperature well above normal operating conditions of commercial circuits but within areas of interest in aerospace engines, deep mining applications and for future missions to the Venus atmosphere. This paper reports for the first time a ring oscillator circuit integrated with a capacitive pressure sensor, both operating at 500 C. This demonstration represents a significant step towards a wireless pressure sensor that can operate at 500 C and confirms the viability of 500 C electronic sensor systems.

Meredith, Roger D.↗

NASA NTRS2008

Prolonged 500 C Operation of 6H-SiC JFET Integrated Circuitry

This paper updates the long-term 500 C electrical testing results from 6H-SiC junction field effect transistors (JFETs) and small integrated circuits that were introduced at ICSCRM-2007. Two packaged JFETs have now been operated in excess of 7000 hours at 500 degC with less than 10% degradation in linear I-V characteristics. Several simple digital and analog demonstration integrated circuits successfully operated for 2000-6500 hours at 500 C before failure.

Neudeck, Philip G.↗

NASA NTRS2008

6H-SiC Transistor Integrated Circuits Demonstrating Prolonged Operation at 500 C

The NASA Glenn Research Center is developing very high temperature semiconductor integrated circuits (ICs) for use in the hot sections of aircraft engines and for Venus exploration where ambient temperatures are well above the approximately 300 degrees Centigrade effective limit of silicon-on-insulator IC technology. In order for beneficial technology insertion to occur, such transistor ICs must be capable of prolonged operation in such harsh environments. This paper reports on the fabrication and long-term 500 degrees Centigrade operation of 6H-SiC integrated circuits based on epitaxial 6H-SiC junction field effect transistors (JFETs). Simple analog amplifier and digital logic gate ICs have now demonstrated thousands of hours of continuous 500 degrees Centigrade operation in oxidizing air atmosphere with minimal changes in relevant electrical parameters. Electrical characterization and modeling of transistors and circuits at temperatures from 24 degrees Centigrade to 500 degrees Centigrade is also described. Desired analog and digital IC functionality spanning this temperature range was demonstrated without changing the input signals or power supply voltages.

Neudeck, Philip G.↗

NASA NTRS2008

Stable Electrical Operation of 6H-SiC JFETs and ICs for Thousands of Hours at 500 C

The fabrication and testing of the first semiconductor transistors and small-scale integrated circuits (ICs) to achieve up to 3000 h of stable electrical operation at 500 C in air ambient is reported. These devices are based on an epitaxial 6H-SiC junction field-effect transistor process that successfully integrated high temperature ohmic contacts, dielectric passivation, and ceramic packaging. Important device and circuit parameters exhibited less than 10% of change over the course of the 500 C operational testing. These results establish a new technology foundation for realizing durable 500 C ICs for combustion-engine sensing and control, deep-well drilling, and other harsh-environment applications.

Neudeck, Philip G.↗

NASA NTRS2008

Long-Term Characterization of 6H-SiC Transistor Integrated Circuit Technology Operating at 500 C

NASA has been developing very high temperature semiconductor integrated circuits for use in the hot sections of aircraft engines and for Venus exploration. This paper reports on long-term 500 C electrical operation of prototype 6H-SiC integrated circuits based on epitaxial 6H-SiC junction field effect transistors (JFETs). As of this writing, some devices have surpassed 4000 hours of continuous 500 C electrical operation in oxidizing air atmosphere with minimal change in relevant electrical parameters.

Neudeck, Philip G.↗

NASA NTRS2007

An Overview of Wide Bandgap Silicon Carbide Sensors and Electronics Development at NASA Glenn Research Center

A brief overview is presented of the sensors and electronics development work ongoing at NASA Glenn Research Center which is intended to meet the needs of future aerospace applications. Three major technology areas are discussed: 1) high temperature SiC electronics, 2) SiC gas sensor technology development, and 3) packaging of harsh environment devices. Highlights of this work include world-record operation of SiC electronic devices including 500?C JFET transistor operation with excellent properties, atomically flat SiC gas sensors integrated with an on-chip temperature detector/heater, and operation of a packaged AC amplifier. A description of the state-of-the-art is given for each topic. It is concluded that significant progress has been made and that given recent advancements the development of high temperature smart sensors is envisioned.

Hunter, Gary W.↗

NASA NTRS2007

Fracture Strength of Single-Crystal Silicon Carbide Microspecimens at Room and Elevated Temperature

Three shapes of tensile specimens were tested--curved with a very low stress concentration factor and straight with either a circular hole or an elliptical hole. The nominal thickness was 125 micron with a net section 100 micron wide; the overall length of these microspecimens was 3.1 mm. They were fabricated by an improved version of deep reactive ion etching, which produced specimens with smooth sidewalls and cross-sections having a slightly trapezoidal shape that was exaggerated inside the holes. The novel test setup used a vertical load train extending into a resistance furnace. The specimens had wedge-shaped ends which fit into ceramic grips. The fixed grip was mounted on a ceramic post, and the movable grip was connected to a load cell and actuator outside the furnace with a ceramic-encased nichrome wire. The same arrangement was used for tests at 24 and at 1000 C. The strengths of the curved specimens for two batches of material (made with slightly different processes) were 0.66+/-0.12 GPa and 0.45+/-0.20 GPa respectively at 24 C with identical values at 1000 C. The fracture strengths of the circular-hole and elliptical-hole specimens (computed from the stress concentration factors and measured loads at failure) were approximately 1.2 GPa with slight decreases at the higher temperature. Fractographic examinations showed failures initiating on the surface--primarily at corners. Weibull predictions of fracture strengths for the hole specimens based on the properties of the curved specimens were reasonably effective for the circular holes, but not for the elliptical holes.

Nemeth, Noel N.↗

NASA NTRS2007

Microsystems, Space Qualified Electronics and Mobile Sensor Platforms for Harsh Environment Applications and Planetary Exploration

NASA Glenn Research Center is presently developing and applying a range of sensor and electronic technologies that can enable future planetary missions. These include space qualified instruments and electronics, high temperature sensors for Venus missions, mobile sensor platforms, and Microsystems for detection of a range of chemical species and particulates. A discussion of each technology area and its level of maturity is given. It is concluded that there is a strong need for low power devices which can be mobile and provide substantial characterization of the planetary environment where and when needed. While a given mission will require tailoring of the technology for the application, basic tools which can enable new planetary missions are being developed.

Hunter, Gary W.↗

NASA NTRS2006

SiC Field Effect Transistor Technology Demonstrating Prolonged Stable Operation at 500 C

While there have been numerous reports of short-term transistor operation at 500 degree C or above, these devices have previously not demonstrated sufficient long-term operational durability at 500 degree C to be considered viable for most envisioned applications. This paper reports the development of Silicone Carbi field effect transistors capable of long-term electrical operation at 500 degree C. A 6H-SiC MESFET was packaged and subjected to continuous electrical operation while residing in a 500 degree C oven in oxidizing air atmosphere for over 2400 hours. The transistor gain, saturation current (IDSS), and on-resistance (RDS) changed by less than 20% from initial values throughout the duration of the biased 500 degree C test. Another high-temperature packaged 6H-SiC MESFET was employed to form a simple one-stage high-temperature low-frequency voltage amplifier. This single-stage common-source amplifier demonstrated stable continuous electrical operation (negligible changes to gain and operating biases) for over 600 hours while residing in a 500 degree C air ambient oven. In both cases, increased leakage from annealing of the Schottky gate-to-channel diode was the dominant transistor degradation mechanism that limited the duration of 500 degree C electrical operation.

Neudeck, Philip G.↗

NASA NTRS2006

Deep Reactive Ion Etching (DRIE) of High Aspect Ratio SiC Microstructures using a Time-Multiplexed Etch-Passivate Process

High aspect ratio silicon carbide (SiC) microstructures are needed for microengines and other harsh environment micro-electro-mechanical systems (MEMS). Previously, deep reactive ion etching (DRIE) of low aspect ratio (AR less than or = 1) deep (greater than 100 micron) trenches in SiC has been reported. However, existing DRIE processes for SiC are not well-suited for definition of high aspect ratio features because such simple etch-only processes provide insufficient control over sidewall roughness and slope. Therefore, we have investigated the use of a time-multiplexed etch-passivate (TMEP) process, which alternates etching with polymer passivation of the etch sidewalls. An optimized TMEP process was used to etch high aspect ratio (AR greater than 5) deep (less than 100 micron) trenches in 6H-SiC. Power MEMS structures (micro turbine blades) in 6H-SiC were also fabricated.

Evans, Laura J.↗