Engineering topics

Barker, Kevin J.

Publications and source records attributed to Barker, Kevin J..

8 records

DOE OSTI2024

A Performance and Energy Study of GPU-Resident Preconditioners for Conjugate Gradient Solvers: In the Context of Existing and Novel Approaches

Optimizing a particular subprogram out of the set of Basic (sparse) Linear Algebra Subprograms (BLAS) for a given architecture is a common topic of research. In applications, however, these BLAS functions rarely appear in isolation; usually, many of them are used together, in various combinations and with varying inputs. As the need to solve a large, sparse linear system is ubiquitous throughout HPC applications, linear solvers constitute a realistic, sufficiently complex and well-defined representative use case for composite BLAS routines. To this end, based on a representative set of matrices drawn from a diverse set of fields, we present a framework to study, from the performance and energy perspective, the efficacy of GPU- resident parallel Conjugate Gradient (CG) linear solver with different preconditioner options, including Gauss-Seidel, Jacobi, and incomplete Cholesky. We also propose a novel GPU-based preconditioner, in which the triangular solves are approximated by an iterative process. The development of this preconditioner was motivated by solving large graph Laplacian linear systems, for which the existing preconditioners either perform slow on GPU-based platforms or are not applicable. We compare the performance of these preconditioners on different hardware accelerator architectures, i.e., AMD MI250X, MI100, Nvidia A100, V100, and Jetson. Our experiments reveal performance trade-offs and provide information on how to select the best strategy for the given linear system, dictated by its properties, and the platform of interest. We demonstrate the application of our novel preconditioner for solving CG and graph Laplacian systems. Overall, the framework can be utilized as a benchmark to guide informed decisions in choosing a specific preconditioner, i.e., whether it is better to rely on the performance of a triangular solver or on the performance of sparse matrix-vector product. Finally, by considering power consumption to solve the linear systems, we report the energy footprint for the solvers.

Preconditioned Conjugate Gradient, GPUs, iterative↗

DOE OSTI2024

Beyond the Bridge: Contention-Based Covert and Side Channel Attacks on Multi-GPU Interconnect

Recently, high-speed interconnects like NVLink have become a standard integration in modern multi-GPU systems, serving as a crucial bridge between CPUs and GPUs. This study highlights the vulnerability of multi-GPU systems to covert and side-channel attacks arising from congestion on these interconnects. An adversary, operating without special permissions, can extract private information about a victim's activities by monitoring NVLink congestion. Specifically, we leverage this insight to develop a covert channel attack across two GPUs, achieving a respectable bandwidth of 33 Kbps. Additionally, we introduce a side-channel attack that allows attackers to fingerprint applications on a remote GPU by probing the shared NVLink interconnect. We underscore the urgent nature of the threats posed by these attacks and advocate for heightened awareness within both industry and academia to implement multi-GPU interconnects with enhanced security measures.

Zhang, Yicheng↗

DOE OSTI2024

Understanding Mixed Precision GEMM with MPGemmFI: Insights into Fault Resilience

Emerging deep learning workloads urgently need fast general matrix multiplication (GEMM). Thus, one of the critical features of machine-learning-specific accelerators such as NVIDIA Tensor Cores, AMD Matrix Cores, and Google TPUs is the support of mixed-precision enabled GEMM. For DNN models, lower-precision FP data formats and computation offer acceptable correctness but significant performance, area, and memory footprint improvement. While promising, the mixed-precision computation on error resilience remains unexplored. To this end, we develop a fault injection framework that systematically injects fault into the mixed-precision computation results. We investigate how the faults affect the accuracy of machine learning applications. Based on the characteristics of error resilience, we offer lightweight error detection and correction solutions that significantly improve the overall model accuracy by 75% if the models experience hardware faults. The solutions can be efficiently integrated into the accelerator's pipelines.

Fang, Bo↗

DOE OSTI2024

HPC Network Simulation Tuning via Automatic Extraction of Hardware Parameters

Popular HPC network interconnection simulators such as SST/macro provide a variety of configurable parameters to explore the design space of hardware components such as network interface cards (NIC), switches, and links among them. While such knobs provide flexibility to explore design trade-offs for novel hardware, manually configuring simulations for matching configurations of the existing hardware to focus on topology exploration can be cumbersome and error-prone, leading to widely inaccurate simulations. This challenge is compounded when specifications of various (proprietary) technologies are not readily available or intentionally omitted. In this work, we propose a framework to autotune the multiple network models’ simulation configurations within SST/macro using Tree-structured Parzen Estimator-based Bayesian optimization to observe the effect on simulation accuracy across different message regimes. These regimes consist of small to large message sizes and latency to bandwidth-bound messages. We provide a detailed analysis of the simulation error for four representative HPC systems. Our Bayesian optimization based autotuning framework for network models achieves a maximum of 5x improvement in accuracy over best-effort manual configurations based on available hardware specifications.

Simulation, autotuning↗

DOE OSTI2024

5G Energy FRAME Report on 5G for Grid Use Case (Year 3 Final Report)

This report provides an extensive overview of the interrelationships among energy, communication, and computing—especially in the context of decarbonization goals, challenges, and opportunities. Technical examples enabled by 5G technologies and their performance are presented, discussed, based on the experiment performed at Pacific Northwest National Laboratory. This is the first use case focused on using 5G for the U.S. power grid and will be referred to as the 5G for Grid Use Case from here on. Specifically, this use case looks at the workflow, which integrates the performance data of a real-world 5G communication testbed and a grid transmission and distribution co-simulation platform. The cross-domain information flow and logic design are illustrated with a combination of power grid contingencies and events. Lastly, a summary of the project achievement and outcome is provided, along with a technology roadmap envisioned by the project team.

24 POWER TRANSMISSION AND DISTRIBUTION↗

DOE OSTI2024

Automatic Extraction of Network Configurations for Realistic Simulation and Validation

Popular HPC network interconnection simulators such as SST Macro provide a variety of configurable parameters to explore the design space of hardware components such as network links and switches. While such knobs provide flexibility to explore design trade-offs for novel hardware, manually configuring simulations for existing hardware to focus on topology exploration can be cumbersome and error-prone, leading to widely inaccurate simulations. This challenge is compounded when specifications of various (proprietary) technologies are not readily available or are intentionally omitted. In this work, we provide a methodology to automatically tune the simulation configuration of the multiple network models running within SST Macro using Bayesian optimization. We perform this optimization in the context of multiple messaging regimes (i.e., small to large and latency to bandwidth-bound messages) and provide a detailed analysis of the simulation error for four systems. With our automated framework, we achieve a 5x improvement in accuracy over best-effort configurations based on available hardware specifications.

Suetterlein, Joshua D.↗

DOE OSTI2024

Cookie-Jar: An Adaptive Re-configurable Framework for Wireless Network Infrastructures

5G advancements like Massive Multiple Input Multiple Output (MIMO) bring high capacity and low latency, but also intensify interference challenges. Static and dynamic coordination techniques address this, often at the cost of increased power draw. We introduce Cookie-Jar (CJ), an interference coordination (IC) framework using reinforcement learning for multi-goal optimization. By dynamically adjusting network, power, and topology parameters based on real-time conditions, CJ improves Signal to Noise and Interference Ratio (SINR) while minimizing power consumption. Simulated 5G experiments showcase CJ's potential, achieving a 15% SINR improvement with near-identical power draw compared to existing methods.

Network↗

DOE OSTI2024

Evaluating Emerging AI/ML Accelerators: IPU, RDU, and and NVIDIA/AMD GPUs

As the size and complexity of AI/ML workloads continue to increase, the demand for specialized hardware accelerators has grown rapidly. To better understand the landscape of commercial AI/ML accelerators, we evaluate and compare several popular platforms, including Graphcore IPU, Sambanova RDU, and GPUs, on a range of AI workloads. Our research aims to help researchers and developers understand the unique features of commercial AI/ML accelerators and provide reference design and performance numbers for research prototypes. By shedding light on the current landscape of commercial AI/ML accelerators, we hope to offer insights into the future development of specialized hardware accelerators for AI/ML.

Peng, Hongwu↗