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Arens, W. E.

Publications and source records attributed to Arens, W. E..

15 records
All sourcesNASA NTRSDOE OSTI
NASA NTRS1987

Spacecraft on-board SAR image generation for EOS-type missions

Spacecraft on-board synthetic aperture radar (SAR) image generation is an extremely difficult problem because of the requirements for high computational rates (usually on the order of Giga-operations per second), high reliability (some missions last up to 10 years), and low power dissipation and mass (typically less than 500 watts and 100 Kilograms). Recently, a JPL study was performed to assess the feasibility of on-board SAR image generation for EOS-type missions. This paper summarizes the results of that study. Specifically, it proposes a processor architecture using a VLSI time-domain parallel array for azimuth correlation. Using available space qualifiable technology to implement the proposed architecture, an on-board SAR processor having acceptable power and mass characteristics appears feasible for EOS-type applications.

Liu, K. Y.↗
NASA NTRS1987

Spacecraft on-board SAR processing technology

This paper provides an assessment of the on-board SAR processing technology for Eos-type missions. The proposed Eos SAR sensor and flight data system are introduced, and the SAR processing requirements are described. The SAR on-board SAR processor architecture selection is discussed, and a baseline processor architecture using a frequency-domain processor for range correlation and a modular fault-tolerant VLSI time-domain parallel array for azimuth correlation are described. The mass storage and VLSI technologies needed for implementing the proposed SAR processing are assessed. It is shown that acceptable processor power and mass characteristics should be feasible for Eos-type applications. A proposed development strategy for the on-board SAR processor is presented.

Liu, K. Y.↗
NASA NTRS1979

Azimuth Correlator for Synthetic Aperture Radar

Azimuth correlation simulates large antenna aperature. It uses charge-coupled-device (CCD) technology to simplify complex, digital, signal-improvement process. In aircraft or spacecraft, correlator processes images onboard and in real time to simplify transmission to ground stations.

Arens, W. E.↗
NASA NTRS1979

Azimuth correlator for real-time synthetic aperture radar image processing

An azimuth correlator architecture is defined wherein a number of serial range-line buffer memories are cascaded such that the output stages of all buffer memories together form a complete and unique range bin in the azimuthal dimension at any given time. A range bin is automatically read out of the last stages of the registers in parallel on a range line sample-by-sample basis for subsequent range migration correction and correlation. Range migration correction is performed on the range bins by effectively varying the length of a delay register at the output of each range-line buffer memory. The corrected range bin output from the delay registers is then correlated with a Doppler reference function to form an image element on a real-time basis.

Arens, W. E.↗
NASA NTRS1978

Real-time SAR image processing onboard a Venus orbiting spacecraft

The potential use of real-time synthetic aperture radar (SAR) processing to produce 200 meter resolution imagery onboard a 1983 Venus orbiter imaging radar spacecraft is described. The VOIR SAR processing requirements are defined in terms of a nominal baseline design evolving from a 1977 VOIR mission study. A candidate onboard SAR processor architecture compatible with the VOIR requirements is next detailed. Finally, implementation characteristics, based upon currently available integrated circuits, are estimated in terms of chip count, power, and weight.

Arens, W. E.↗
NASA NTRS1978

Real-time SAR image processing onboard a Venus orbiting spacecraft

The potential use of real-time SAR processing to produce 200-meter resolution imagery onboard a 1983 Venus Orbiter Imaging Radar (VOIR) spacecraft is discussed. The current NASA SAR processor development program and its relationship to the VOIR application are described. VOIR SAR processing requirements are defined in terms of a nominal baseline design evolving from a 1977 VOIR mission study by JPL. A candidate onboard SAR processor architecture compatible with the VOIR requirements is described. Detailed implementation characteristics, based on currently available integrated circuits, are estimated in terms of chip count, weight, and power.

Arens, W. E.↗
NASA NTRS1978

Real-time synthetic aperture radar data processing for space applications

Range and azimuth correlation in the time domain using current state-of-the-art CCD LSI technology provides a potentially practical means of achieving real-time pipeline processing of SAR images for future space missions. The proposed range correlator approach, using already demonstrated CCD transversal filtering techniques, will require very little power: less than 10 watts per Seasat-type 20-km processing module. The azimuth correlator architecture is considerably more demanding since it requires a large number of parallel chips (1020 for a Seasat-type 20-km module) to achieve a real-time processing capability.

Arens, W. E.↗
NASA NTRS1978

Application of microprocessors to spacecraft synthetic aperture radar processing

A ground-based digital synthetic aperture radar (SAR) processor capable of correlating images from raw spacecraft data at real-time rates is currently under development. The processor design requirements are particularly formidable due to (1) range migration effects resulting from planetary curvature and rotation, (2) antenna beam pointing errors, and (3) variation of the Doppler reference function with changing orbital parameters. Based upon the current effort, this paper describes a candidate real-time on-board SAR processing implementation approach that might evolve for future spacecraft applications. Key features include the use of custom large scale integration (LSI) charge-coupled device (CCD) technology to accomplish the correlation functions and microprocessor technology to effect control.

Arens, W. E.↗
NASA NTRS1977

Charge-coupled device data processor for an airborne imaging radar system

Processing of raw analog echo data from synthetic aperture radar receiver into images on board an airborne radar platform is discussed. Processing is made feasible by utilizing charge-coupled devices (CCD). CCD circuits are utilized to perform input sampling, presumming, range correlation and azimuth correlation in the analog domain. These radar data processing functions are implemented for single-look or multiple-look imaging radar systems.

Arens, W. E.↗
NASA NTRS1977

CCD architecture for spacecraft SAR image processing

A real-time synthetic aperture radar (SAR) image processing architecture amenable to future on-board spacecraft applications is currently under development. Using state-of-the-art charge-coupled device (CCD) technology, low cost and power are inherent features. Other characteristics include the ability to reprogram correlation reference functions, correct for range migration, and compensate for antenna beam pointing errors on the spacecraft in real time. The first spaceborne demonstration is scheduled to be flown as an experiment on a 1982 Shuttle imaging radar mission (SIR-B). This paper describes the architecture and implementation characteristics of this initial spaceborne CCD SAR image processor.

Arens, W. E.↗
NASA NTRS1973

Solid motor diagnostic instrumentation

A review of typical surveillance and monitoring practices followed during the flight phases of representative solid-propellant upper stages and apogee motors was conducted to evaluate the need for improved flight diagnostic instrumentation on future spacecraft. The capabilities of the flight instrumentation package were limited to the detection of whether or not the solid motor was the cause of failure and to the identification of probable primary failure modes. Conceptual designs of self-contained flight instrumentation packages capable of meeting these reqirements were generated and their performance, typical cost, and unit characteristics determined. Comparisons of a continuous real time and a thresholded hybrid design were made on the basis of performance, mass, power, cost, and expected life. The results of this analysis substantiated the feasibility of a self-contained independent flight instrumentation module as well as the existence of performance margins by which to exploit growth option applications.

Nakamura, Y.↗