Engineering topics

Agrawal, Dharma P.

Publications and source records attributed to Agrawal, Dharma P..

4 records

NASA NTRS1989

Computational models and resource allocation for supercomputers

There are several different architectures used in supercomputers, with differing computational models. These different models present a variety of resource allocation problems that must be solved. The computational needs of a program must be cast in terms of the computational model supported by the supercomputer, and this must be done in a way that makes effective use of the machine's resources. This is the resource allocation problem. The computational models of available supercomputers and the associated resource allocation techniques are surveyed. It is shown that many problems and solutions appear repeatedly in very different computing environments. Some case studies are presented, showing concrete computational models and the allocation strategies used.

Mauney, Jon↗

NASA NTRS1989

Modeling techniques in a parallelizing compiler for the B-HIVE multiprocessor system

The parallelizing compiler for the B-HIVE loosely-coupled multiprocessor system uses a medium grain model to minimize the communication overhead. A medium grain model is shown to be an optimum way of merging fine grain operations into parallel tasks such that the parallelism obtained at the grain level is retained and communication overhead is decreased. A new communication model is introduced in this paper, allowing additional overlap between computation and communication. Simulation results indicate that the medium grain communication model shows promise for automatic parallelization for a loosely-coupled multiprocessor system.

Kim, Sukil↗

NASA NTRS1988

Retargeting of existing FORTRAN program and development of parallel compilers

The software models used in implementing the parallelizing compiler for the B-HIVE multiprocessor system are described. The various models and strategies used in the compiler development are: flexible granularity model, which allows a compromise between two extreme granularity models; communication model, which is capable of precisely describing the interprocessor communication timings and patterns; loop type detection strategy, which identifies different types of loops; critical path with coloring scheme, which is a versatile scheduling strategy for any multicomputer with some associated communication costs; and loop allocation strategy, which realizes optimum overlapped operations between computation and communication of the system. Using these models, several sample routines of the AIR3D package are examined and tested. It may be noted that automatically generated codes are highly parallelized to provide the maximized degree of parallelism, obtaining the speedup up to a 28 to 32-processor system. A comparison of parallel codes for both the existing and proposed communication model, is performed and the corresponding expected speedup factors are obtained. The experimentation shows that the B-HIVE compiler produces more efficient codes than existing techniques. Work is progressing well in completing the final phase of the compiler. Numerous enhancements are needed to improve the capabilities of the parallelizing compiler.

Agrawal, Dharma P.↗

NASA NTRS1987

A survey and comparison of fault-tolerant multistage interconnection networks

Intrinsically fault-tolerant multistage interconnection networks (MINs) are surveyed, categorizing the MINs by the amount of hardware modifications they use to provide redundancy. The diversity of such MINs and the scope of fault-tolerance techniques are examined. A hypothetical MIN with ideal engineering characteristics is defined, and the surveyed MINs are compared to this standard.

Adams, George B., III↗